On 3/28/22 06:57, Xiaojuan Yang wrote:
+typedef struct LoongArchIPI { + SysBusDevice parent_obj; + IPICore core[MAX_IPI_CORE_NUM]; + MemoryRegion ipi_mmio[MAX_IPI_CORE_NUM]; +} LoongArchIPI;
Why does this have an array of cores?Surely the IPI device itself should not have this, but the board model should have an array of IPI devices, one for each CPU that it supports.
r~