From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> This adds the necessary modeling to support some of our firmware tests at EL3 implementing PSCI (TBM). These are the test-cases that were previously relying on QEMU's builtin PSCI emulation.
Cheers, Edgar ChangeLog: v2 -> v3: * Make RVBAR_ELx register reflect updated rvbar * Sample rvbar prop at reset * Remove setting of minimum_version_id_old * Use OBJECT_DECLARE_SIMPLE_TYPE v1 -> v2: * crf: Change APU_MAX_CPU to CRF_MAX_CPU * crf: Remove empty interfaces * crf: Add include guards * apu-ctrl: Change NUM_CPUS to APU_MAX_CPU * apu-ctrl: Fix indentation * apu-ctrl: Remove empty interfaces * apu-ctrl: Add include guards * xlnx-zynqmp: Add comment clarifying SER/DESerializer Edgar E. Iglesias (6): hw/arm/xlnx-zynqmp: Add an unimplemented SERDES area target/arm: Make rvbar settable after realize hw/misc: Add a model of the Xilinx ZynqMP CRF hw/arm/xlnx-zynqmp: Connect the ZynqMP CRF hw/misc: Add a model of the Xilinx ZynqMP APU Control hw/arm/xlnx-zynqmp: Connect the ZynqMP APU Control include/hw/arm/xlnx-zynqmp.h | 4 + include/hw/misc/xlnx-zynqmp-apu-ctrl.h | 93 +++++++++ include/hw/misc/xlnx-zynqmp-crf.h | 211 ++++++++++++++++++++ target/arm/cpu.h | 3 +- hw/arm/xlnx-zynqmp.c | 46 ++++- hw/misc/xlnx-zynqmp-apu-ctrl.c | 253 +++++++++++++++++++++++ hw/misc/xlnx-zynqmp-crf.c | 266 +++++++++++++++++++++++++ target/arm/cpu.c | 12 +- target/arm/helper.c | 10 +- hw/misc/meson.build | 2 + 10 files changed, 889 insertions(+), 11 deletions(-) create mode 100644 include/hw/misc/xlnx-zynqmp-apu-ctrl.h create mode 100644 include/hw/misc/xlnx-zynqmp-crf.h create mode 100644 hw/misc/xlnx-zynqmp-apu-ctrl.c create mode 100644 hw/misc/xlnx-zynqmp-crf.c -- 2.25.1
