The float??_minnum implementation differs from Hexagon for SNaN,
it returns NaN, but Hexagon returns the other input. So, we use
float??_minimum_number.
Test cases added to tests/tcg/hexagon/fpstuff.c
Signed-off-by: Taylor Simpson <tsimp...@quicinc.com>
---
target/hexagon/op_helper.c | 14 ++-----
tests/tcg/hexagon/fpstuff.c | 79 +++++++++++++++++++++++++++++--------
2 files changed, 66 insertions(+), 27 deletions(-)
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 057baf9a48..33a86be7be 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -948,7 +948,7 @@ float32 HELPER(sfmax)(CPUHexagonState *env, float32 RsV,
float32 RtV)
{
float32 RdV;
arch_fpop_start(env);
- RdV = float32_maxnum(RsV, RtV, &env->fp_status);
+ RdV = float32_maximum_number(RsV, RtV, &env->fp_status);
arch_fpop_end(env);
return RdV;
}
@@ -957,7 +957,7 @@ float32 HELPER(sfmin)(CPUHexagonState *env, float32 RsV,
float32 RtV)
{
float32 RdV;
arch_fpop_start(env);
- RdV = float32_minnum(RsV, RtV, &env->fp_status);
+ RdV = float32_minimum_number(RsV, RtV, &env->fp_status);
arch_fpop_end(env);
return RdV;
}
@@ -1041,10 +1041,7 @@ float64 HELPER(dfmax)(CPUHexagonState *env, float64
RssV, float64 RttV)
{
float64 RddV;
arch_fpop_start(env);
- RddV = float64_maxnum(RssV, RttV, &env->fp_status);
- if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
- float_raise(float_flag_invalid, &env->fp_status);
- }
+ RddV = float64_maximum_number(RssV, RttV, &env->fp_status);
arch_fpop_end(env);
return RddV;
}
@@ -1053,10 +1050,7 @@ float64 HELPER(dfmin)(CPUHexagonState *env, float64
RssV, float64 RttV)
{
float64 RddV;
arch_fpop_start(env);
- RddV = float64_minnum(RssV, RttV, &env->fp_status);
- if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
- float_raise(float_flag_invalid, &env->fp_status);
- }
+ RddV = float64_minimum_number(RssV, RttV, &env->fp_status);
arch_fpop_end(env);
return RddV;
}
diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c
index 0dff429f4c..7a65ebc74d 100644
--- a/tests/tcg/hexagon/fpstuff.c
+++ b/tests/tcg/hexagon/fpstuff.c
@@ -39,7 +39,8 @@ const int SF_ANY = 0x3f800000;
const int SF_HEX_NAN = 0xffffffff;
const int SF_small_neg = 0xab98fba8;
-const long long DF_NaN = 0x7ff8000000000000ULL;
+const long long DF_QNaN = 0x7ff8000000000000ULL;
+const long long DF_SNaN = 0x7ff7000000000000ULL;
const long long DF_ANY = 0x3f80000000000000ULL;
const long long DF_HEX_NAN = 0xffffffffffffffffULL;
const long long DF_small_neg = 0xbd731f7500000000ULL;
@@ -126,7 +127,7 @@ static void check_compare_exception(void)
"p0 = dfcmp.eq(%2, %3)\n\t"
"%0 = p0\n\t"
"%1 = usr\n\t"
- : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(cmp), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
: "r2", "p0", "usr");
check32(cmp, 0);
check_fpstatus(usr, 0);
@@ -135,7 +136,7 @@ static void check_compare_exception(void)
"p0 = dfcmp.gt(%2, %3)\n\t"
"%0 = p0\n\t"
"%1 = usr\n\t"
- : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(cmp), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
: "r2", "p0", "usr");
check32(cmp, 0);
check_fpstatus(usr, 0);
@@ -144,7 +145,7 @@ static void check_compare_exception(void)
"p0 = dfcmp.ge(%2, %3)\n\t"
"%0 = p0\n\t"
"%1 = usr\n\t"
- : "=r"(cmp), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(cmp), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
: "r2", "p0", "usr");
check32(cmp, 0);
check_fpstatus(usr, 0);
@@ -206,7 +207,7 @@ static void check_dfminmax(void)
int usr;
/*
- * Execute dfmin/dfmax instructions with one operand as NaN
+ * Execute dfmin/dfmax instructions with one operand as SNaN
* Check that
* Result is the other operand
* Invalid bit in USR is set
@@ -214,7 +215,7 @@ static void check_dfminmax(void)
asm (CLEAR_FPSTATUS
"%0 = dfmin(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(minmax), "=r"(usr) : "r"(DF_SNaN), "r"(DF_ANY)
: "r2", "usr");
check64(minmax, DF_ANY);
check_fpstatus(usr, FPINVF);
@@ -222,13 +223,35 @@ static void check_dfminmax(void)
asm (CLEAR_FPSTATUS
"%0 = dfmax(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(minmax), "=r"(usr) : "r"(DF_SNaN), "r"(DF_ANY)
: "r2", "usr");
check64(minmax, DF_ANY);
check_fpstatus(usr, FPINVF);
/*
- * Execute dfmin/dfmax instructions with both operands NaN
+ * Execute dfmin/dfmax instructions with one operand as QNaN
+ * Check that
+ * Result is the other operand
+ * No bit in USR is set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(minmax, DF_ANY);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
+ : "r2", "usr");
+ check64(minmax, DF_ANY);
+ check_fpstatus(usr, 0);
+
+ /*
+ * Execute dfmin/dfmax instructions with both operands SNaN
* Check that
* Result is DF_HEX_NAN
* Invalid bit in USR is set
@@ -236,7 +259,7 @@ static void check_dfminmax(void)
asm (CLEAR_FPSTATUS
"%0 = dfmin(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_NaN)
+ : "=r"(minmax), "=r"(usr) : "r"(DF_SNaN), "r"(DF_SNaN)
: "r2", "usr");
check64(minmax, DF_HEX_NAN);
check_fpstatus(usr, FPINVF);
@@ -244,10 +267,32 @@ static void check_dfminmax(void)
asm (CLEAR_FPSTATUS
"%0 = dfmax(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(minmax), "=r"(usr) : "r"(DF_NaN), "r"(DF_NaN)
+ : "=r"(minmax), "=r"(usr) : "r"(DF_SNaN), "r"(DF_SNaN)
: "r2", "usr");
check64(minmax, DF_HEX_NAN);
check_fpstatus(usr, FPINVF);
+
+ /*
+ * Execute dfmin/dfmax instructions with both operands QNaN
+ * Check that
+ * Result is DF_HEX_NAN
+ * No bit in USR is set
+ */
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmin(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_QNaN), "r"(DF_QNaN)
+ : "r2", "usr");
+ check64(minmax, DF_HEX_NAN);
+ check_fpstatus(usr, 0);
+
+ asm (CLEAR_FPSTATUS
+ "%0 = dfmax(%2, %3)\n\t"
+ "%1 = usr\n\t"
+ : "=r"(minmax), "=r"(usr) : "r"(DF_QNaN), "r"(DF_QNaN)
+ : "r2", "usr");
+ check64(minmax, DF_HEX_NAN);
+ check_fpstatus(usr, 0);
}
static void check_recip_exception(void)
@@ -411,7 +456,7 @@ static void check_canonical_NaN(void)
asm(CLEAR_FPSTATUS
"%0 = convert_df2sf(%2)\n\t"
"%1 = usr\n\t"
- : "=r"(sf_result), "=r"(usr) : "r"(DF_NaN)
+ : "=r"(sf_result), "=r"(usr) : "r"(DF_QNaN)
: "r2", "usr");
check32(sf_result, SF_HEX_NAN);
check_fpstatus(usr, 0);
@@ -419,7 +464,7 @@ static void check_canonical_NaN(void)
asm(CLEAR_FPSTATUS
"%0 = dfadd(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(df_result), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(df_result), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
: "r2", "usr");
check64(df_result, DF_HEX_NAN);
check_fpstatus(usr, 0);
@@ -427,7 +472,7 @@ static void check_canonical_NaN(void)
asm(CLEAR_FPSTATUS
"%0 = dfsub(%2, %3)\n\t"
"%1 = usr\n\t"
- : "=r"(df_result), "=r"(usr) : "r"(DF_NaN), "r"(DF_ANY)
+ : "=r"(df_result), "=r"(usr) : "r"(DF_QNaN), "r"(DF_ANY)
: "r2", "usr");
check64(df_result, DF_HEX_NAN);
check_fpstatus(usr, 0);
@@ -567,7 +612,7 @@ static void check_float2int_convs()
asm(CLEAR_FPSTATUS
"%0 = convert_df2w(%2)\n\t"
"%1 = usr\n\t"
- : "=r"(res32), "=r"(usr) : "r"(DF_NaN)
+ : "=r"(res32), "=r"(usr) : "r"(DF_QNaN)
: "r2", "usr");
check32(res32, -1);
check_fpstatus(usr, FPINVF);
@@ -575,7 +620,7 @@ static void check_float2int_convs()
asm(CLEAR_FPSTATUS
"%0 = convert_df2w(%2):chop\n\t"
"%1 = usr\n\t"
- : "=r"(res32), "=r"(usr) : "r"(DF_NaN)
+ : "=r"(res32), "=r"(usr) : "r"(DF_QNaN)
: "r2", "usr");
check32(res32, -1);
check_fpstatus(usr, FPINVF);
@@ -583,7 +628,7 @@ static void check_float2int_convs()
asm(CLEAR_FPSTATUS
"%0 = convert_df2d(%2)\n\t"
"%1 = usr\n\t"
- : "=r"(res64), "=r"(usr) : "r"(DF_NaN)
+ : "=r"(res64), "=r"(usr) : "r"(DF_QNaN)
: "r2", "usr");
check64(res64, -1);
check_fpstatus(usr, FPINVF);
@@ -591,7 +636,7 @@ static void check_float2int_convs()
asm(CLEAR_FPSTATUS
"%0 = convert_df2d(%2):chop\n\t"
"%1 = usr\n\t"
- : "=r"(res64), "=r"(usr) : "r"(DF_NaN)
+ : "=r"(res64), "=r"(usr) : "r"(DF_QNaN)
: "r2", "usr");
check64(res64, -1);
check_fpstatus(usr, FPINVF);
--
2.17.1
