From: Joel Stanley <j...@jms.id.au>
When time permits, we should introduce defines for the HW strapping
registers to cleanly decode the values.
SCU500 = 0x00422016
Disable ARM JTAG trusted world debug: 0x1
Disable ARM JTAG debug: 0x1
VGA Memory Size: 0x1 [16MB]
Cortex M3: 0x1 [Disabled]
Boot device: 0x1 [eMMC]
Reserved: 0x1
SCU510 = 0x80000848
Secure Boot Enable: 0x1
Enable boot SPI or eMMC ABR (second boot): 0x1
Enable LPC mode: 0x1 [LPC]
Disable LPC SuperIO 0x2e/0x4e: 0x1
Signed-off-by: Joel Stanley <j...@jms.id.au>
[ clg: rewrote the commit log ]
Signed-off-by: Cédric Le Goater <c...@kaod.org>
---
hw/arm/aspeed.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 7590b36bb017..f71a5d87473f 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -160,8 +160,8 @@ struct AspeedMachineState {
#define TACOMA_BMC_HW_STRAP2 0x00000040
/* Rainier hardware value: (QEMU prototype) */
-#define RAINIER_BMC_HW_STRAP1 0x00000000
-#define RAINIER_BMC_HW_STRAP2 0x00000000
+#define RAINIER_BMC_HW_STRAP1 0x00422016
+#define RAINIER_BMC_HW_STRAP2 0x80000848
/* Fuji hardware value */
#define FUJI_BMC_HW_STRAP1 0x00000000
--
2.34.1
