On Tue, 18 Jan 2022 17:48:55 +0000
Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> From: Jonathan Cameron <jonathan.came...@huawei.com>
>
> pxb_map_irq_fn() handled the necessary removal of the swizzle
> applied to the PXB interrupts by the bus to which it was attached
> but neglected to apply the normal swizzle for PCI root ports
> on the expander bridge.
>
> Result of this was on ARM virt, the PME interrupts for a second
> RP on a PXB instance were miss-routed to #45 rather than #46.
>
> Tested with a selection of different configurations with 1 to 5
> RP per PXB instance. Note on my x86 test setup the PME interrupts
> are not triggered so I haven't been able to test this.
>
> Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
> Cc: Michael S. Tsirkin <m...@redhat.com>
> Cc: Marcel Apfelbaum <marcel.apfelb...@gmail.com>
Ping.
> ---
> hw/pci-bridge/pci_expander_bridge.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/hw/pci-bridge/pci_expander_bridge.c
> b/hw/pci-bridge/pci_expander_bridge.c
> index 10e6e7c2ab..de932286b5 100644
> --- a/hw/pci-bridge/pci_expander_bridge.c
> +++ b/hw/pci-bridge/pci_expander_bridge.c
> @@ -192,6 +192,12 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
> {
> PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev;
>
> + /*
> + * First carry out normal swizzle to handle
> + * multple root ports on a pxb instance.
> + */
> + pin = pci_swizzle_map_irq_fn(pci_dev, pin);
> +
> /*
> * The bios does not index the pxb slot number when
> * it computes the IRQ because it resides on bus 0
