Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> --- include/exec/cpu_ldst.h | 53 ++++++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 25 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5c999966de..0932096d29 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -321,6 +321,8 @@ void cpu_atomic_sto_le_mmu(CPUArchState *env, target_ulong addr, Int128 val, void cpu_atomic_sto_be_mmu(CPUArchState *env, target_ulong addr, Int128 val, MemOpIdx oi, uintptr_t retaddr); +#ifdef CONFIG_TCG + #if defined(CONFIG_USER_ONLY) extern __thread uintptr_t helper_retaddr; @@ -374,9 +376,34 @@ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, { return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)]; } - #endif /* defined(CONFIG_USER_ONLY) */ +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +#ifdef CONFIG_USER_ONLY +static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx) +{ + return g2h(env_cpu(env), addr); +} +#else +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx); +#endif + +#endif /* CONFIG_TCG */ + #ifdef TARGET_WORDS_BIGENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data @@ -450,28 +477,4 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) return (int16_t)cpu_lduw_code(env, addr); } -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -#ifdef CONFIG_USER_ONLY -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx) -{ - return g2h(env_cpu(env), addr); -} -#else -void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx); -#endif - #endif /* CPU_LDST_H */ -- 2.34.1