RISC-V privileged specification v1.12 introduced a mconfigptr
which will hold the physical address of a configuration data
structure. As Qemu doesn't have a configuration data structure,
is read as zero which is valid as per the priv spec.
Signed-off-by: Atish Patra <ati...@rivosinc.com>
---
target/riscv/cpu_bits.h | 1 +
target/riscv/csr.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index f96d26399607..89440241632a 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -148,6 +148,7 @@
#define CSR_MARCHID 0xf12
#define CSR_MIMPID 0xf13
#define CSR_MHARTID 0xf14
+#define CSR_MCONFIGPTR 0xf15
/* Machine Trap Setup */
#define CSR_MSTATUS 0x300
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 25a0df498669..4366e5e95ce8 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -3020,6 +3020,8 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
[CSR_MARCHID] = { "marchid", any, read_zero },
[CSR_MIMPID] = { "mimpid", any, read_zero },
[CSR_MHARTID] = { "mhartid", any, read_mhartid },
+ [CSR_MCONFIGPTR] = { "mconfigptr", any, read_zero,
+ .min_priv_ver = PRIV_VERSION_1_12_0 },
/* Machine Trap Setup */
[CSR_MSTATUS] = { "mstatus", any, read_mstatus,
write_mstatus, NULL,
--
2.30.2
