Re: [PATCH v2 13/14] target/ppc: 405: Program exception cleanup

[Cédric Le Goater]

On 1/18/22 19:44, Fabiano Rosas wrote:

The 405 Program Interrupt does not set SRR1 with any diagnostic bits,
just a clean copy of the MSR.

We're using the BookE Exception Syndrome Register which is different
from the 405.

I restored the setting of SPR_40x_ESR.

Signed-off-by: Fabiano Rosas <faro...@linux.ibm.com>

Reviewed-by: Cédric Le Goater <c...@kaod.org>


Thanks,

C.

---
  target/ppc/excp_helper.c | 16 ----------------
  1 file changed, 16 deletions(-)

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 13674a102f..2efec6d13b 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -484,30 +484,14 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
                  env->error_code = 0;
                  return;
              }
-
-            /*
-             * FP exceptions always have NIP pointing to the faulting
-             * instruction, so always use store_next and claim we are
-             * precise in the MSR.
-             */
-            msr |= 0x00100000;
-            env->spr[SPR_BOOKE_ESR] = ESR_FP;
              break;
          case POWERPC_EXCP_INVAL:
              trace_ppc_excp_inval(env->nip);
-            msr |= 0x00080000;
-            env->spr[SPR_BOOKE_ESR] = ESR_PIL;
              break;
          case POWERPC_EXCP_PRIV:
-            msr |= 0x00040000;
-            env->spr[SPR_BOOKE_ESR] = ESR_PPR;
-            break;
          case POWERPC_EXCP_TRAP:
-            msr |= 0x00020000;
-            env->spr[SPR_BOOKE_ESR] = ESR_PTR;
              break;
          default:
-            /* Should never occur */
              cpu_abort(cs, "Invalid program exception %d. Aborting\n",
                        env->error_code);
              break;