From: Ben Widawsky <ben.widaw...@intel.com>
This cleanup will make it easier to add support for CXL to the mix.
Signed-off-by: Ben Widawsky <ben.widaw...@intel.com>
Signed-off-by: Jonathan Cameron <jonathan.came...@huawei.com>
---
hw/i386/acpi-build.c | 38 +++++++++++++++++++++-----------------
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index ce823e8fcb..1d8ee988f2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1398,6 +1398,23 @@ static void build_smb0(Aml *table, I2CBus *smbus, int
devnr, int func)
aml_append(table, scope);
}
+enum { PCI, PCIE };
+static void init_pci_acpi(Aml *dev, int uid, int type, bool native_pcie_hp)
+{
+ if (type == PCI) {
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(uid)));
+ } else {
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
+ aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(uid)));
+ /* Expander bridges do not have ACPI PCI Hot-plug enabled */
+ aml_append(dev, build_q35_osc_method(native_pcie_hp));
+ }
+}
+
static void
build_dsdt(GArray *table_data, BIOSLinker *linker,
AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -1429,9 +1446,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
if (misc->is_piix4) {
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
- aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
- aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+ init_pci_acpi(dev, pcmc->pci_root_uid, PCI, false);
aml_append(sb_scope, dev);
aml_append(dsdt, sb_scope);
@@ -1447,11 +1462,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
} else {
sb_scope = aml_scope("_SB");
dev = aml_device("PCI0");
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
- aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
- aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
- aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
- aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
+ init_pci_acpi(dev, pcmc->pci_root_uid, PCIE, !pm->pcihp_bridge_en);
aml_append(sb_scope, dev);
if (mcfg_valid) {
aml_append(sb_scope, build_q35_dram_controller(&mcfg));
@@ -1562,17 +1573,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
scope = aml_scope("\\_SB");
dev = aml_device("PC%.02X", bus_num);
- aml_append(dev, aml_name_decl("_UID", aml_int(bus_num)));
aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
- if (pci_bus_is_express(bus)) {
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
- aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
- /* Expander bridges do not have ACPI PCI Hot-plug enabled */
- aml_append(dev, build_q35_osc_method(true));
- } else {
- aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
- }
+ init_pci_acpi(dev, bus_num,
+ pci_bus_is_express(bus) ? PCIE : PCI, true);
if (numa_node != NUMA_NODE_UNASSIGNED) {
aml_append(dev, aml_name_decl("_PXM", aml_int(numa_node)));
--
2.32.0
