On 15:28 Fri 14 Jan , Francisco Iglesias wrote:
> Connect Versal's PMC SLCR (system-level control registers) model.
>
> Signed-off-by: Francisco Iglesias <francisco.igles...@xilinx.com>
Reviewed-by: Luc Michel <l...@lmichel.fr>
> ---
> hw/arm/xlnx-versal.c | 71
> +++++++++++++++++++++++++++++++++++++++++++-
> include/hw/arm/xlnx-versal.h | 5 ++++
> 2 files changed, 75 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index fefd00b57c..c8c0c102c7 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -21,11 +21,13 @@
> #include "kvm_arm.h"
> #include "hw/misc/unimp.h"
> #include "hw/arm/xlnx-versal.h"
> +#include "qemu/log.h"
> +#include "hw/sysbus.h"
>
> #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
> #define GEM_REVISION 0x40070106
>
> -#define VERSAL_NUM_PMC_APB_IRQS 2
> +#define VERSAL_NUM_PMC_APB_IRQS 3
>
> static void versal_create_apu_cpus(Versal *s)
> {
> @@ -271,6 +273,7 @@ static void versal_create_pmc_apb_irq_orgate(Versal *s,
> qemu_irq *pic)
> * models:
> * - RTC
> * - BBRAM
> + * - PMC SLCR
> */
> object_initialize_child(OBJECT(s), "pmc-apb-irq-orgate",
> &s->pmc.apb_irq_orgate, TYPE_OR_IRQ);
> @@ -392,6 +395,23 @@ static void versal_create_efuse(Versal *s, qemu_irq *pic)
> sysbus_connect_irq(SYS_BUS_DEVICE(ctrl), 0, pic[VERSAL_EFUSE_IRQ]);
> }
>
> +static void versal_create_pmc_iou_slcr(Versal *s, qemu_irq *pic)
> +{
> + SysBusDevice *sbd;
> +
> + object_initialize_child(OBJECT(s), "versal-pmc-iou-slcr",
> &s->pmc.iou.slcr,
> + TYPE_XILINX_VERSAL_PMC_IOU_SLCR);
> +
> + sbd = SYS_BUS_DEVICE(&s->pmc.iou.slcr);
> + sysbus_realize(sbd, &error_fatal);
> +
> + memory_region_add_subregion(&s->mr_ps, MM_PMC_PMC_IOU_SLCR,
> + sysbus_mmio_get_region(sbd, 0));
> +
> + sysbus_connect_irq(sbd, 0,
> + qdev_get_gpio_in(DEVICE(&s->pmc.apb_irq_orgate), 2));
> +}
> +
> /* This takes the board allocated linear DDR memory and creates aliases
> * for each split DDR range/aperture on the Versal address map.
> */
> @@ -448,8 +468,31 @@ static void versal_unimp_area(Versal *s, const char
> *name,
> memory_region_add_subregion(mr, base, mr_dev);
> }
>
> +static void versal_unimp_sd_emmc_sel(void *opaque, int n, int level)
> +{
> + qemu_log_mask(LOG_UNIMP,
> + "Selecting between enabling SD mode or eMMC mode on "
> + "controller %d is not yet implemented\n", n);
> +}
> +
> +static void versal_unimp_qspi_ospi_mux_sel(void *opaque, int n, int level)
> +{
> + qemu_log_mask(LOG_UNIMP,
> + "Selecting between enabling the QSPI or OSPI linear
> address "
> + "region is not yet implemented\n");
> +}
> +
> +static void versal_unimp_irq_parity_imr(void *opaque, int n, int level)
> +{
> + qemu_log_mask(LOG_UNIMP,
> + "PMC SLCR parity interrupt behaviour "
> + "is not yet implemented\n");
> +}
> +
> static void versal_unimp(Versal *s)
> {
> + qemu_irq gpio_in;
> +
> versal_unimp_area(s, "psm", &s->mr_ps,
> MM_PSM_START, MM_PSM_END - MM_PSM_START);
> versal_unimp_area(s, "crl", &s->mr_ps,
> @@ -464,6 +507,31 @@ static void versal_unimp(Versal *s)
> MM_IOU_SCNTR, MM_IOU_SCNTR_SIZE);
> versal_unimp_area(s, "iou-scntr-seucre", &s->mr_ps,
> MM_IOU_SCNTRS, MM_IOU_SCNTRS_SIZE);
> +
> + qdev_init_gpio_in_named(DEVICE(s), versal_unimp_sd_emmc_sel,
> + "sd-emmc-sel-dummy", 2);
> + qdev_init_gpio_in_named(DEVICE(s), versal_unimp_qspi_ospi_mux_sel,
> + "qspi-ospi-mux-sel-dummy", 1);
> + qdev_init_gpio_in_named(DEVICE(s), versal_unimp_irq_parity_imr,
> + "irq-parity-imr-dummy", 1);
> +
> + gpio_in = qdev_get_gpio_in_named(DEVICE(s), "sd-emmc-sel-dummy", 0);
> + qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr), "sd-emmc-sel", 0,
> + gpio_in);
> +
> + gpio_in = qdev_get_gpio_in_named(DEVICE(s), "sd-emmc-sel-dummy", 1);
> + qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr), "sd-emmc-sel", 1,
> + gpio_in);
> +
> + gpio_in = qdev_get_gpio_in_named(DEVICE(s), "qspi-ospi-mux-sel-dummy",
> 0);
> + qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr),
> + "qspi-ospi-mux-sel", 0,
> + gpio_in);
> +
> + gpio_in = qdev_get_gpio_in_named(DEVICE(s), "irq-parity-imr-dummy", 0);
> + qdev_connect_gpio_out_named(DEVICE(&s->pmc.iou.slcr),
> + SYSBUS_DEVICE_GPIO_IRQ, 0,
> + gpio_in);
> }
>
> static void versal_realize(DeviceState *dev, Error **errp)
> @@ -483,6 +551,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
> versal_create_xrams(s, pic);
> versal_create_bbram(s, pic);
> versal_create_efuse(s, pic);
> + versal_create_pmc_iou_slcr(s, pic);
> versal_map_ddr(s);
> versal_unimp(s);
>
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index 62fb6f0a68..811df73350 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -26,6 +26,7 @@
> #include "hw/misc/xlnx-versal-xramc.h"
> #include "hw/nvram/xlnx-bbram.h"
> #include "hw/nvram/xlnx-versal-efuse.h"
> +#include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
>
> #define TYPE_XLNX_VERSAL "xlnx-versal"
> OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
> @@ -78,6 +79,7 @@ struct Versal {
> struct {
> struct {
> SDHCIState sd[XLNX_VERSAL_NR_SDS];
> + XlnxVersalPmcIouSlcr slcr;
> } iou;
>
> XlnxZynqMPRTC rtc;
> @@ -179,6 +181,9 @@ struct Versal {
> #define MM_FPD_FPD_APU 0xfd5c0000
> #define MM_FPD_FPD_APU_SIZE 0x100
>
> +#define MM_PMC_PMC_IOU_SLCR 0xf1060000
> +#define MM_PMC_PMC_IOU_SLCR_SIZE 0x10000
> +
> #define MM_PMC_SD0 0xf1040000U
> #define MM_PMC_SD0_SIZE 0x10000
> #define MM_PMC_BBRAM_CTRL 0xf11f0000
> --
> 2.11.0
>
>
--
