Glue "cortex-r4" to r1p4, the latest available TRM.
Set MPU and Thumb division feature bit.
Cc: Peter Maydell <peter.mayd...@linaro.org>
Signed-off-by: Andreas Färber <andreas.faer...@web.de>
---
target-arm/cpu.h | 1 +
target-arm/helper.c | 15 +++++++++++++++
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index c38dfd5..44868e6 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -427,6 +427,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
#define ARM_CPUID_ARM11MPCORE 0x410fb022
#define ARM_CPUID_CORTEXA8 0x410fc080
#define ARM_CPUID_CORTEXA9 0x410fc090
+#define ARM_CPUID_CORTEXR4_R1P4 0x411FC144
#define ARM_CPUID_CORTEXM3 0x410fc231
#define ARM_CPUID_ANY 0xffffffff
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3de0781..4836762 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -41,6 +41,12 @@ static uint32_t arm1176_cp15_c0_c1[8] =
static uint32_t arm1176_cp15_c0_c2[8] =
{ 0x0140011, 0x12002111, 0x11231121, 0x01102131, 0x01141, 0, 0, 0 };
+static uint32_t cortexr4_cp15_c0_c1[8] =
+{ 0x0131, 0x001, 0x010400, 0x0, 0x0210030, 0x00000000, 0x01200000, 0x0211 };
+
+static uint32_t cortexr4_cp15_c0_c2[8] =
+{ 0x1101111, 0x13112111, 0x21232131, 0x01112131, 0x0010142, 0x0, 0, 0 };
+
static uint32_t cpu_arm_find_by_name(const char *name);
static inline void set_feature(CPUARMState *env, int feature)
@@ -170,6 +176,14 @@ static void cpu_reset_model_id(CPUARMState *env)
env->cp15.c0_ccsid[1] = 0x200fe015; /* 16k L1 icache. */
env->cp15.c1_sys = 0x00c50078;
break;
+ case ARM_CPUID_CORTEXR4_R1P4:
+ set_feature(env, ARM_FEATURE_V7);
+ set_feature(env, ARM_FEATURE_THUMB2);
+ set_feature(env, ARM_FEATURE_THUMB_DIV);
+ set_feature(env, ARM_FEATURE_MPU);
+ memcpy(env->cp15.c0_c1, cortexr4_cp15_c0_c1, 8 * sizeof(uint32_t));
+ memcpy(env->cp15.c0_c2, cortexr4_cp15_c0_c2, 8 * sizeof(uint32_t));
+ break;
case ARM_CPUID_CORTEXM3:
set_feature(env, ARM_FEATURE_THUMB2);
set_feature(env, ARM_FEATURE_V7);
@@ -408,6 +422,7 @@ static const struct arm_cpu_t arm_cpu_names[] = {
{ ARM_CPUID_CORTEXM3, "cortex-m3"},
{ ARM_CPUID_CORTEXA8, "cortex-a8"},
{ ARM_CPUID_CORTEXA9, "cortex-a9"},
+ { ARM_CPUID_CORTEXR4_R1P4, "cortex-r4"},
{ ARM_CPUID_TI925T, "ti925t" },
{ ARM_CPUID_PXA250, "pxa250" },
{ ARM_CPUID_SA1100, "sa1100" },
--
1.7.7
