From: "BALATON Zoltan" bala...@eik.bme.hu
To: "Fabiano Rosas" faro...@linux.ibm.com
Cc: qemu-devel@nongnu.org, qemu-...@nongnu.org, c...@kaod.org,
danielhb...@gmail.com, ma...@locati.it
Date: Mon, 13 Dec 2021 20:51:15 +0100 (CET)
Subject: Re: [PATCH] target/ppc: Fix e6500 boot
On Mon, 13 Dec 2021, Fabiano Rosas wrote:
> When Altivec support was added to the e6500 kernel in 2012[1], the
> QEMU code was not changed, so we don't register the VPU/VPUA
> exceptions for the e6500:
>
> qemu: fatal: Raised an exception without defined vector 73
>
> Note that the error message says 73, instead of 32, which is the IVOR
> for VPU. This is because QEMU knows only knows about the VPU interrupt
The word "knows" is repeated in the above line.
> for the 7400s. In theory, we should not be raising _that_ VPU
> interrupt, but instead another one specific for the e6500.
>
> We unfortunately cannot register e6500-specific VPU/VPUA interrupts
> because the SPEU/EFPDI interrupts also use IVOR32/33. These are
> present only in the e500v1/2 versions. From the user manual:
>
> e500v1, e500v2: only SPEU/EFPDI/EFPRI
> e500mc, e5500: no SPEU/EFPDI/EFPRI/VPU/VPUA
> e6500: only VPU/VPUA
>
> So I'm leaving IVOR32/33 as SPEU/EFPDI, but altering the dispatch code
> to convert the VPU #73 to a #32 when we're in the e6500. Since the
> handling for SPEU and VPU is the same this is the only change that's
> needed. The EFPDI is not implemented and will cause an abort. I don't
> think it worth it changing the error message to take VPUA into
> consideration, so I'm not changing anything there.
>
> This bug was discussed in the thread:
> https://lists.gnu.org/archive/html/qemu-ppc/2021-06/msg00222.html
>
> 1- https://git.kernel.org/torvalds/c/cd66cc2ee52
>
> Reported-by: <ma...@locati.it>
> Signed-off-by: Fabiano Rosas <faro...@linux.ibm.com>
> ---
> target/ppc/cpu_init.c | 6 ++++++
> target/ppc/excp_helper.c | 12 +++++++++++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index 6695985e9b..d8efcb24ed 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -2273,8 +2273,14 @@ static void init_excp_e200(CPUPPCState *env,
> target_ulong ivpr_mask)
> env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000;
> env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000;
> env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000;
> + /*
> + * These two are the same IVOR as POWERPC_EXCP_VPU and
Maybe clearar to say "The next two" or even "SPEU and EFPDI are the
same..." then no need for the extra empty line but not a big deal.
Regards,
BALATON Zoltan
> + * POWERPC_EXCP_VPUA. We deal with that when dispatching at
> + * powerpc_excp().
> + */
> env->excp_vectors[POWERPC_EXCP_SPEU] = 0x00000000;
> env->excp_vectors[POWERPC_EXCP_EFPDI] = 0x00000000;
> +
> env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000;
> env->ivor_mask = 0x0000FFF7UL;
> env->ivpr_mask = ivpr_mask;
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 17607adbe4..7bb170f440 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -344,6 +344,16 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> excp = POWERPC_EXCP_PROGRAM;
> }
>
> +#ifdef TARGET_PPC64
> + /*
> + * SPEU and VPU share the same IVOR but they exist in different
> + * processors. SPEU is e500v1/2 only and VPU is e6500 only.
> + */
> + if (excp_model == POWERPC_EXCP_BOOKE && excp == POWERPC_EXCP_VPU) {
> + excp = POWERPC_EXCP_SPEU;
> + }
> +#endif
> +
> switch (excp) {
> case POWERPC_EXCP_NONE:
> /* Should never happen */
> @@ -569,7 +579,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
> excp_model, int excp)
> cpu_abort(cs, "Debug exception triggered on unsupported model\n");
> }
> break;
> - case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable
> */
> + case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavailable/VPU
> */
> env->spr[SPR_BOOKE_ESR] = ESR_SPV;
> break;
> case POWERPC_EXCP_EFPDI: /* Embedded floating-point data interrupt
> */
>
I have tried to launch a freshly compiled qemu from git master on a NXP
T2080RDB devkit that has a e6500 CPU in combination with a freshly compiled
kernel 5.16-rc6
I have Debian SID ppc64 up and running using such a kernel, and when I launch
qemu to run a VM with the same debian sid for ppc64 and the same kernel using
--enable-kvm I end up with a kernel panic
[....]
Run /sbin/init as init process
random: fast init done
systemd[1]: illegal instruction (4) at 3fff96562ac8 nip 3fff96562ac8 lr
3fff96562aa8 code 1 in libc-2.32.so[3fff96516000+1f7000]
systemd[1]: code: 60000000 38600006 9122b7e8 4801bead 60000000 60000000
8122b7e8 2c090004
systemd[1]: code: 40820014 39200005 60000000 9122b7e8 <00000000> 60000000
8122b7e8 2c090005
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
Rebooting in 180 seconds..
On the positive side, for the first time I am not flooded by milions kernel
error messages from the serial console attached to the devkit, not a single
error spitted out from it, great!
The kernel config file I used
https://repo.powerprogress.org/t2080rdb/qemu/kernel_5.16-rc6.config
The resulting kernel
https://repo.powerprogress.org/t2080rdb/qemu/uImage_5.16-rc6
The complete console output I get when configuring qemu before compilation
https://repo.powerprogress.org/t2080rdb/qemu/2021-12-25_qemu_git_configure_on_ppc64.txt
The complete console output that end up with the kernel panic when launching
qemuhttps://repo.powerprogress.org/t2080rdb/qemu/2021-12-25_qemu_ppc64_e6500_kvm_debian_sid_log.txt
