After moving all the instruction counting to TCG Ops code
this helper is not needed anymore.
Signed-off-by: Daniel Henrique Barboza <danielhb...@gmail.com>
---
target/ppc/helper.h | 1 -
target/ppc/power8-pmu-insn-cnt.c.inc | 4 --
target/ppc/power8-pmu.c | 60 ----------------------------
3 files changed, 65 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 4d8193caab..de80e82ebe 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -25,7 +25,6 @@ DEF_HELPER_2(store_mmcr0, void, env, tl)
DEF_HELPER_2(store_mmcr1, void, env, tl)
DEF_HELPER_3(store_pmc, void, env, i32, i64)
DEF_HELPER_2(read_pmc, tl, env, i32)
-DEF_HELPER_2(insns_inc, void, env, i32)
DEF_HELPER_1(pmu_overflow, void, env)
#endif
DEF_HELPER_1(check_tlb_flush_local, void, env)
diff --git a/target/ppc/power8-pmu-insn-cnt.c.inc
b/target/ppc/power8-pmu-insn-cnt.c.inc
index 7bd07d8105..8b1604b4c7 100644
--- a/target/ppc/power8-pmu-insn-cnt.c.inc
+++ b/target/ppc/power8-pmu-insn-cnt.c.inc
@@ -303,10 +303,6 @@ static void pmu_check_overflow(DisasContext *ctx)
#if defined(TARGET_PPC64)
static void pmu_count_insns(DisasContext *ctx)
{
- /*
- * Do not bother calling the helper if the PMU isn't counting
- * instructions.
- */
if (!ctx->pmu_insn_cnt) {
return;
}
diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c
index 6696c9b3ae..bfc052b49e 100644
--- a/target/ppc/power8-pmu.c
+++ b/target/ppc/power8-pmu.c
@@ -135,52 +135,6 @@ bool pmu_insn_cnt_enabled(CPUPPCState *env)
return false;
}
-static bool pmu_increment_insns(CPUPPCState *env, uint32_t num_insns)
-{
- bool overflow_triggered = false;
- int sprn;
-
- /* PMC6 never counts instructions */
- for (sprn = SPR_POWER_PMC1; sprn <= SPR_POWER_PMC5; sprn++) {
- PMUEventType evt_type = pmc_get_event(env, sprn);
- bool insn_event = evt_type == PMU_EVENT_INSTRUCTIONS ||
- evt_type == PMU_EVENT_INSN_RUN_LATCH;
-
- if (pmc_is_inactive(env, sprn) || !insn_event) {
- continue;
- }
-
- if (evt_type == PMU_EVENT_INSTRUCTIONS) {
- env->spr[sprn] += num_insns;
- }
-
- if (evt_type == PMU_EVENT_INSN_RUN_LATCH &&
- env->spr[SPR_CTRL] & CTRL_RUN) {
- env->spr[sprn] += num_insns;
- }
-
- if (env->spr[sprn] >= PMC_COUNTER_NEGATIVE_VAL &&
- pmc_has_overflow_enabled(env, sprn)) {
-
- overflow_triggered = true;
-
- /*
- * The real PMU will always trigger a counter overflow with
- * PMC_COUNTER_NEGATIVE_VAL. We don't have an easy way to
- * do that since we're counting block of instructions at
- * the end of each translation block, and we're probably
- * passing this value at this point.
- *
- * Let's write PMC_COUNTER_NEGATIVE_VAL to the overflowed
- * counter to simulate what the real hardware would do.
- */
- env->spr[sprn] = PMC_COUNTER_NEGATIVE_VAL;
- }
- }
-
- return overflow_triggered;
-}
-
static void pmu_update_cycles(CPUPPCState *env)
{
uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
@@ -309,20 +263,6 @@ static void fire_PMC_interrupt(PowerPCCPU *cpu)
return;
}
-/* This helper assumes that the PMC is running. */
-void helper_insns_inc(CPUPPCState *env, uint32_t num_insns)
-{
- bool overflow_triggered;
- PowerPCCPU *cpu;
-
- overflow_triggered = pmu_increment_insns(env, num_insns);
-
- if (overflow_triggered) {
- cpu = env_archcpu(env);
- fire_PMC_interrupt(cpu);
- }
-}
-
/* Helper to fire a PMC interrupt from TCG code */
void helper_pmu_overflow(CPUPPCState *env)
{
--
2.33.1
