On 12/20/21 09:33, Cédric Le Goater wrote: >> >> Don't know if this is the reason of our problems but I think there is >> something to investigate around timer interrupts: >> >> >> / # cat /proc/interrupts >> CPU0 >> 16: 68 UIC 1 Level serial >> LOC: 0 Local timer interrupts for timer event device >> LOC: 0 Local timer interrupts for others >> SPU: 0 Spurious interrupts >> PMI: 0 Performance monitoring interrupts >> MCE: 0 Machine check exceptions >> >> Any idea what the problem can be ? How does QEMU generates timer >> interrupts ? > > I did some archeology and fixed the 405 timer (PIT). Please see commits > in : > > https://github.com/legoater/qemu/commits/ppc405 > > but we are still getting segfaults. At some point /init tries to load from > fffffe04 which is obviously wrong.
Fetching an u32 value from a missing ROM? > > Add -d int,mmu to have more info from QEMU internals. > > I have gathered some info on this page : > > https://github.com/legoater/qemu/wiki/ref405ep > > Thanks, > > C. >
