From: Richard Henderson <richard.hender...@linaro.org>
Use float64r32_mul. Fixes a double-rounding issue with performing
the compuation in float64 and then rounding afterward.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20211119160502.17432-32-richard.hender...@linaro.org>
Signed-off-by: Cédric Le Goater <c...@kaod.org>
---
target/ppc/helper.h | 1 +
target/ppc/fpu_helper.c | 12 ++++++++++++
target/ppc/translate/fp-impl.c.inc | 11 ++++-------
3 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 2b80c2f22835..f70a3aefcbf4 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -98,6 +98,7 @@ DEF_HELPER_3(fadds, f64, env, f64, f64)
DEF_HELPER_3(fsub, f64, env, f64, f64)
DEF_HELPER_3(fsubs, f64, env, f64, f64)
DEF_HELPER_3(fmul, f64, env, f64, f64)
+DEF_HELPER_3(fmuls, f64, env, f64, f64)
DEF_HELPER_3(fdiv, f64, env, f64, f64)
DEF_HELPER_3(fdivs, f64, env, f64, f64)
DEF_HELPER_4(fmadd, i64, env, i64, i64, i64)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index c36cf05d8098..4acc557c088a 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -581,6 +581,18 @@ float64 helper_fmul(CPUPPCState *env, float64 arg1,
float64 arg2)
return ret;
}
+/* fmuls - fmuls. */
+float64 helper_fmuls(CPUPPCState *env, float64 arg1, float64 arg2)
+{
+ float64 ret = float64r32_mul(arg1, arg2, &env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
+
+ if (unlikely(flags & float_flag_invalid)) {
+ float_invalid_op_mul(env, flags, 1, GETPC());
+ }
+ return ret;
+}
+
static void float_invalid_op_div(CPUPPCState *env, int flags,
bool set_fprc, uintptr_t retaddr)
{
diff --git a/target/ppc/translate/fp-impl.c.inc
b/target/ppc/translate/fp-impl.c.inc
index b84097544f62..bf56e35cb686 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -100,7 +100,7 @@ static void gen_f##name(DisasContext *ctx)
\
_GEN_FLOAT_AB(name, 0x3F, op2, inval, set_fprf, type); \
_GEN_FLOAT_AB(name##s, 0x3B, op2, inval, set_fprf, type);
-#define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \
+#define _GEN_FLOAT_AC(name, op1, op2, inval, set_fprf, type) \
static void gen_f##name(DisasContext *ctx) \
{ \
TCGv_i64 t0; \
@@ -116,10 +116,7 @@ static void gen_f##name(DisasContext *ctx)
\
gen_reset_fpstatus(); \
get_fpr(t0, rA(ctx->opcode)); \
get_fpr(t1, rC(ctx->opcode)); \
- gen_helper_f##op(t2, cpu_env, t0, t1); \
- if (isfloat) { \
- gen_helper_frsp(t2, cpu_env, t2); \
- } \
+ gen_helper_f##name(t2, cpu_env, t0, t1); \
set_fpr(rD(ctx->opcode), t2); \
if (set_fprf) { \
gen_compute_fprf_float64(t2); \
@@ -132,8 +129,8 @@ static void gen_f##name(DisasContext *ctx)
\
tcg_temp_free_i64(t2); \
}
#define GEN_FLOAT_AC(name, op2, inval, set_fprf, type) \
-_GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \
-_GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type);
+_GEN_FLOAT_AC(name, 0x3F, op2, inval, set_fprf, type); \
+_GEN_FLOAT_AC(name##s, 0x3B, op2, inval, set_fprf, type);
#define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \
static void gen_f##name(DisasContext *ctx) \
--
2.31.1
