On 11/30/21 18:32, Peter Maydell wrote: > The calculation of the length of TLB range invalidate operations > in tlbi_aa64_range_get_length() is incorrect in two ways: > * the NUM field is 5 bits, but we read only 4 bits > * we miscalculate the page_shift value, because of an > off-by-one error: > TG 0b00 is invalid > TG 0b01 is 4K granule size == 4096 == 2^12 > TG 0b10 is 16K granule size == 16384 == 2^14 > TG 0b11 is 64K granule size == 65536 == 2^16 > so page_shift should be (TG - 1) * 2 + 12 > > Thanks to the bug report submitter Cha HyunSoo for identifying > both these errors. > > Fixes: 84940ed82552d3c > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/734 > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > Not marked for-6.2 because this isn't a regression: we > shipped the TLBI range invalidate support in 6.1. > I have no repro case for this issue, but this doesn't break > booting an aarch64 kernel, at least. > --- > target/arm/helper.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
