[RFC PATCH v2 04/30] target/loongarch: Define exceptions for LoongArch.

[Xiaojuan Yang]

This patch introduces all possible exceptions.

Signed-off-by: Xiaojuan Yang <yangxiaoj...@loongson.cn>
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
 target/loongarch/cpu.c | 13 +++++++++++++
 target/loongarch/cpu.h | 17 +++++++++++++++--
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index a53c8ebfb5..16443159cc 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -37,6 +37,19 @@ static const char * const excp_names[EXCP_LAST + 1] = {
     [EXCP_BREAK] = "Break",
     [EXCP_INE] = "Instruction Non-existent",
     [EXCP_FPE] = "Floating Point Exception",
+    [EXCP_IPE] = "Error privilege level access",
+    [EXCP_TLBL] = "TLB load",
+    [EXCP_TLBS] = "TLB store",
+    [EXCP_INST_NOTAVAIL] = "TLB inst not exist",
+    [EXCP_TLBM] = "TLB modify",
+    [EXCP_TLBPE] = "TLB priviledged error",
+    [EXCP_TLBNX] = "TLB execute-inhibit",
+    [EXCP_TLBNR] = "TLB read-inhibit",
+    [EXCP_EXT_INTERRUPT] = "Interrupt",
+    [EXCP_DBP] = "Debug breakpoint",
+    [EXCP_IBE] = "Instruction bus error",
+    [EXCP_DBE] = "Data bus error",
+    [EXCP_DINT] = "Debug interrupt",
 };
 
 const char *loongarch_exception_name(int32_t exception)
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 10fcd53104..399c4cb5e8 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -369,8 +369,21 @@ enum {
     EXCP_BREAK,
     EXCP_INE,
     EXCP_FPE,
-
-    EXCP_LAST = EXCP_FPE,
+    EXCP_IPE,
+    EXCP_TLBL,
+    EXCP_TLBS,
+    EXCP_INST_NOTAVAIL,
+    EXCP_TLBM,
+    EXCP_TLBPE,
+    EXCP_TLBNX,
+    EXCP_TLBNR,
+    EXCP_EXT_INTERRUPT,
+    EXCP_DBP,
+    EXCP_IBE,
+    EXCP_DBE,
+    EXCP_DINT,
+
+    EXCP_LAST = EXCP_DINT,
 };
 
 #define LOONGARCH_CPU_TYPE_SUFFIX "-" TYPE_LOONGARCH_CPU
-- 
2.27.0