riscv: Ajdust vector atomic check with XLEN

Richard Henderson Wed, 10 Nov 2021 02:55:47 -0800

On 11/10/21 8:04 AM, LIU Zhiwei wrote:

Signed-off-by: LIU Zhiwei <zhiwei_...@c-sky.com>
---
  target/riscv/insn_trans/trans_rvv.c.inc | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)


Reviewed-by: Richard Henderson <richard.hender...@linaro.org>

r~

- Re: [PATCH v2 01/14] target/riscv: Sign extend pc f... Richard Henderson
[PATCH v2 02/14] target/riscv: Ignore the pc bits above ... LIU Zhiwei
[PATCH v2 04/14] target/riscv: Use gdb xml according to ... LIU Zhiwei
- Re: [PATCH v2 04/14] target/riscv: Use gdb xml acco... LIU Zhiwei
[PATCH v2 05/14] target/riscv: Calculate address accordi... LIU Zhiwei
- Re: [PATCH v2 05/14] target/riscv: Calculate addres... Richard Henderson
- - Re: [PATCH v2 05/14] target/riscv: Calculate ad... LIU Zhiwei
  - - Re: [PATCH v2 05/14] target/riscv: Calculat... Richard Henderson
[PATCH v2 03/14] target/riscv: Extend pc for runtime pc ... LIU Zhiwei
[PATCH v2 07/14] target/riscv: Ajdust vector atomic chec... LIU Zhiwei
- Re: [PATCH v2 07/14] target/riscv: Ajdust vector at... Richard Henderson
[PATCH v2 06/14] target/riscv: Adjust vsetvl according t... LIU Zhiwei
[PATCH v2 11/14] target/riscv: Adjust scalar reg in vect... LIU Zhiwei
- Re: [PATCH v2 11/14] target/riscv: Adjust scalar re... Richard Henderson
[PATCH v2 10/14] target/riscv: Adjust vector address wit... LIU Zhiwei
- Re: [PATCH v2 10/14] target/riscv: Adjust vector ad... Richard Henderson
- - Re: [PATCH v2 10/14] target/riscv: Adjust vecto... LIU Zhiwei
  - - Re: [PATCH v2 10/14] target/riscv: Adjust v... Richard Henderson
[PATCH v2 08/14] target/riscv: Fix check range for first... LIU Zhiwei
[PATCH v2 12/14] target/riscv: Split out the vill from v... LIU Zhiwei
- Re: [PATCH v2 12/14] target/riscv: Split out the vi... Richard Henderson

Re: [PATCH v2 07/14] target/riscv: Ajdust vector atomic check with XLEN

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