The recent ESCC reset changes cause a regression when attemping to use a real
SS-5 Sun PROM instead of OpenBIOS. The Sun PROM doesn't send an explicit reset
command to the ESCC but gets stuck in a loop probing the keyboard waiting for
STATUS_TXEMPTY to be set in R_STATUS followed by SPEC_ALLSENT in R_SPEC.
Reading through the ESCC datasheet again indicates that SPEC_ALLSENT is updated
when a write to W_TXCTRL1 selects async mode, or remains high if sync mode is
selected. Whilst there is no explicit mention of STATUS_TXEMPTY, the ESCC device
emulation always updates these two register bits together when transmitting
data.
Add extra logic to update both transmit status bits accordingly when writing to
W_TXCTRL1 which enables the Sun PROM to initialise and boot again under QEMU.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/char/escc.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/hw/char/escc.c b/hw/char/escc.c
index 0fce4f6324..b33cdc229f 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -575,6 +575,18 @@ static void escc_mem_write(void *opaque, hwaddr addr,
s->wregs[s->reg] = val;
break;
case W_TXCTRL1:
+ s->wregs[s->reg] = val;
+ if (val & TXCTRL1_STPMSK) {
+ ESCCSERIOQueue *q = &s->queue;
+ if (s->type == escc_serial || q->count == 0) {
+ s->rregs[R_STATUS] |= STATUS_TXEMPTY;
+ s->rregs[R_SPEC] |= SPEC_ALLSENT;
+ }
+ } else {
+ s->rregs[R_STATUS] &= ~STATUS_TXEMPTY;
+ s->rregs[R_SPEC] |= SPEC_ALLSENT;
+ }
+ /* fallthrough */
case W_TXCTRL2:
s->wregs[s->reg] = val;
escc_update_parameters(s);
--
2.20.1
