On 31.10.2011 [15:14:12 +1100], David Gibson wrote:
> Good points below. I forgot to CC Nish, the original patch author on
> my post, so I've added him to the list now.
>
> Nish, can you correct these problems and resend the patch please?
When run with a PPC Book3S (server) CPU Currently 'info tlb' in the
qemu monitor reports "dump_mmu: unimplemented". However, during
bringup work, it can be quite handy to have the SLB entries, which are
available in the CPUPPCState. This patch adds an implementation of
info tlb for book3s, which dumps the SLB.
Signed-off-by: Nishanth Aravamudan <n...@us.ibm.com>
Signed-off-by: David Gibson <da...@gibson.dropbear.id.au>
---
v2: Update to build on PPC and PPC64 via suggestion from AGraf.
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 137a494..5847453 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1545,12 +1545,40 @@ static void mmubooke206_dump_mmu(FILE *f,
fprintf_function cpu_fprintf,
}
}
+#if defined(TARGET_PPC64)
+static void mmubooks_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
+ CPUState *env)
+{
+ int i;
+ uint64_t slbe, slbv;
+
+ cpu_synchronize_state(env);
+
+ cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n");
+ for (i = 0; i < env->slb_nr; i++) {
+ slbe = env->slb[i].esid;
+ slbv = env->slb[i].vsid;
+ if (slbe == 0 && slbv == 0) {
+ continue;
+ }
+ cpu_fprintf(f, "%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n",
+ i, slbe, slbv);
+ }
+}
+#endif
+
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env)
{
switch (env->mmu_model) {
case POWERPC_MMU_BOOKE206:
mmubooke206_dump_mmu(f, cpu_fprintf, env);
break;
+#if defined(TARGET_PPC64)
+ case POWERPC_MMU_64B:
+ case POWERPC_MMU_2_06:
+ mmubooks_dump_mmu(f, cpu_fprintf, env);
+ break;
+#endif
default:
cpu_fprintf(f, "%s: unimplemented\n", __func__);
}
--
Nishanth Aravamudan <n...@us.ibm.com>
IBM Linux Technology Center
