And the FMC registers are just an alias to write
to these watchdog 2 registers?
If this is the same watchdog mapped into the FMC, I would say yes
and the logic generate load/stores transactions on the AHB bus.
Adding an address space for the WDT registers in the model is the
closer we can get without implementing the bus protocol.
Just curious, is it
strictly necessary to use the FMC registers to disable
the alternate boot watchdog, or could you just use the
old address, 0x1e78504C?
Hey, this is something to try on HW and check how both register
sets evolve. Would you have time ?
Andrew did some experiments in the past and the two register sets
were evolving independently.
In our OpenBMC initialization
for Fuji, we’re using the FMC registers, but would
it still work if we used the old addresses? Just curious,
the more I think about it, it seems odd to me that these
FMC watchdog registers exist if they’re just an alias.
We should ask the HW designers.
Aspeed tells me its an independent logic. So, I will drop the
model from this patchset.
Thanks,
C.
