On Wed, Oct 20, 2021 at 2:52 AM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> The position of this read-only field is dependent on the
> current cpu width. Rather than having to compute that
> difference in many places, compute it only on read.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 3 +--
> target/riscv/csr.c | 37 ++++++++++++++++++++++---------------
> target/riscv/translate.c | 5 ++---
> 3 files changed, 25 insertions(+), 20 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 429afd1f48..0d1132f39d 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -185,10 +185,9 @@ bool riscv_cpu_fp_enabled(CPURISCVState *env)
>
> void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env)
> {
> - uint64_t sd = riscv_cpu_mxl(env) == MXL_RV32 ? MSTATUS32_SD :
> MSTATUS64_SD;
> uint64_t mstatus_mask = MSTATUS_MXR | MSTATUS_SUM | MSTATUS_FS |
> MSTATUS_SPP | MSTATUS_SPIE | MSTATUS_SIE |
> - MSTATUS64_UXL | sd;
> + MSTATUS64_UXL;
> bool current_virt = riscv_cpu_virt_enabled(env);
>
> g_assert(riscv_has_ext(env, RVH));
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index c4a479ddd2..69e4d65fcd 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -477,10 +477,28 @@ static RISCVException read_mhartid(CPURISCVState *env,
> int csrno,
> }
>
> /* Machine Trap Setup */
> +
> +/* We do not store SD explicitly, only compute it on demand. */
> +static uint64_t add_status_sd(RISCVMXL xl, uint64_t status)
> +{
> + if ((status & MSTATUS_FS) == MSTATUS_FS ||
> + (status & MSTATUS_XS) == MSTATUS_XS) {
> + switch (xl) {
> + case MXL_RV32:
> + return status | MSTATUS32_SD;
> + case MXL_RV64:
> + return status | MSTATUS64_SD;
> + default:
> + g_assert_not_reached();
> + }
> + }
> + return status;
> +}
> +
> static RISCVException read_mstatus(CPURISCVState *env, int csrno,
> target_ulong *val)
> {
> - *val = env->mstatus;
> + *val = add_status_sd(riscv_cpu_mxl(env), env->mstatus);
> return RISCV_EXCP_NONE;
> }
>
> @@ -498,7 +516,6 @@ static RISCVException write_mstatus(CPURISCVState *env,
> int csrno,
> {
> uint64_t mstatus = env->mstatus;
> uint64_t mask = 0;
> - int dirty;
>
> /* flush tlb on mstatus fields that affect VM */
> if ((val ^ mstatus) & (MSTATUS_MXR | MSTATUS_MPP | MSTATUS_MPV |
> @@ -520,12 +537,7 @@ static RISCVException write_mstatus(CPURISCVState *env,
> int csrno,
>
> mstatus = (mstatus & ~mask) | (val & mask);
>
> - dirty = ((mstatus & MSTATUS_FS) == MSTATUS_FS) |
> - ((mstatus & MSTATUS_XS) == MSTATUS_XS);
> - if (riscv_cpu_mxl(env) == MXL_RV32) {
> - mstatus = set_field(mstatus, MSTATUS32_SD, dirty);
> - } else {
> - mstatus = set_field(mstatus, MSTATUS64_SD, dirty);
> + if (riscv_cpu_mxl(env) == MXL_RV64) {
> /* SXL and UXL fields are for now read only */
> mstatus = set_field(mstatus, MSTATUS64_SXL, MXL_RV64);
> mstatus = set_field(mstatus, MSTATUS64_UXL, MXL_RV64);
> @@ -798,13 +810,8 @@ static RISCVException read_sstatus(CPURISCVState *env,
> int csrno,
> {
> target_ulong mask = (sstatus_v1_10_mask);
>
> - if (riscv_cpu_mxl(env) == MXL_RV32) {
> - mask |= SSTATUS32_SD;
> - } else {
> - mask |= SSTATUS64_SD;
> - }
> -
> - *val = env->mstatus & mask;
> + /* TODO: Use SXL not MXL. */
> + *val = add_status_sd(riscv_cpu_mxl(env), env->mstatus & mask);
> return RISCV_EXCP_NONE;
> }
>
> diff --git a/target/riscv/translate.c b/target/riscv/translate.c
> index de013fbf9b..35245aafa7 100644
> --- a/target/riscv/translate.c
> +++ b/target/riscv/translate.c
> @@ -280,7 +280,6 @@ static void gen_jal(DisasContext *ctx, int rd,
> target_ulong imm)
> static void mark_fs_dirty(DisasContext *ctx)
> {
> TCGv tmp;
> - target_ulong sd = get_xl(ctx) == MXL_RV32 ? MSTATUS32_SD : MSTATUS64_SD;
>
> if (ctx->mstatus_fs != MSTATUS_FS) {
> /* Remember the state change for the rest of the TB. */
> @@ -288,7 +287,7 @@ static void mark_fs_dirty(DisasContext *ctx)
>
> tmp = tcg_temp_new();
> tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
> - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
> + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
> tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus));
> tcg_temp_free(tmp);
> }
> @@ -299,7 +298,7 @@ static void mark_fs_dirty(DisasContext *ctx)
>
> tmp = tcg_temp_new();
> tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
> - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd);
> + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS);
> tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs));
> tcg_temp_free(tmp);
> }
> --
> 2.25.1
>
>
