On 9/10/21 3:47 PM, Philipp Tomsich wrote:
Just wondering regarding the UXL-comment: the clzw instruction will be an illegal encoding
for RV32 (the w-form instructions are present on RV64 only), so it should never be
encountered in a RV32 instruction stream.
Correct.
Did you mean that clz (the instruction operating on xlen-registers) would have
ctx->w
set for RV32 executing on RV64 ... or am I missing something fundamental?
Yes.
Or, as some test patches I was planning to post this weekend, replacing "w" as boolean
with an "operation length" (ol) as an enum of MXL_RV*, so that we can represent "d"
operations on RV128 with the same mechanism.
r~
