On 9/6/21 9:05 AM, Alistair Francis wrote:
I honestly don't see a scenario where that happens. The maintenance
overhead and confusion of changing the CPUs at build time is too high.
Yes indeed. One qemu image should support all cpu variations at once.
I also don't think we should need that for CSR accesses. Custom
instructions are a whole different can of worms.
Custom instruction sets are manageable.
In general, we use separate decodetree instances, and select on them at a high level of
translation. We have examples of this in both target/arm/ and target/mips/ dealing with
different ISAs.
Prod me when you get to that point.
r~
