On 8/13/21 1:01 PM, Philippe Mathieu-Daudé wrote: > Raise Loongson-3A1000 SEGBITS from 40 to 48. > > Philippe Mathieu-Daudé (2): > target/mips: Document Loongson-3A CPU definitions > target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr
Thanks, applied to mips-next.