On Wed, Aug 18, 2021 at 09:02:59PM -0700, Tong Ho wrote: > This series implements the Xilinx eFUSE and BBRAM devices for > the Versal and ZynqMP product families. > > Furthermore, both new devices are connected to the xlnx-versal-virt > board and the xlnx-zcu102 board.
Hi Tong, A few general comments. Patch #1 should probably be moved to be the last patch of the series. I think we should remove the commands about register generation "Partially generated by xregqemu.py". It may be confusing to others since it's not a tool we run in the build process but rather a one off extraction of reg definitions... Thanks! Edgar
