On 7/25/21 11:39 PM, Song Gao wrote:
+void gen_base_offset_addr(TCGv addr, int base, int offset)
+{
+ if (base == 0) {
+ tcg_gen_movi_tl(addr, offset);
+ } else if (offset == 0) {
+ gen_load_gpr(addr, base);
+ } else {
+ tcg_gen_movi_tl(addr, offset);
+ gen_op_addr_add(addr, cpu_gpr[base], addr);
+ }
+}
Using the interfaces I quote above from my riscv cleanup,
this can be tidied to
tcg_gen_addi_tl(addr, gpr_src(base), offset);
'riscv cleanup' series at
https://patchew.org/QEMU/20210709042608.883256-1-richard.hender...@linaro.org/
, Right?
Yes.
r~
