EFER.SVME has to be set, and EFER[63:16], EFER[9], EFER[7:5]
are reserved and must be zero.
My version of the manual says "any MBZ [must-be-zero] bit of EFER is
set", so that would be 7:1 (not 7:5), 9 and 63:16. In QEMU bits 13 and
15 are also unimplemented and thus must-be-zero.
On 05/07/21 10:18, Lara Lazier wrote:
+#define MSR_EFER_RESERVED 0xffffffffffff02e0
+
This has the same issue with 32-bit compilation, except in this case the
check *is* needed on 32-bit builds just without bits 63:32 set.
The obvious way here would be to add a #ifdef, but that's less
maintainable than the slightly ugly:
#define MSR_EFER_RESERVED ((target_ulong)(int)0xffff02e0u)
(where I was too lazy to compute the right mask for the bits I listed
above...).
Paolo
