On 6/24/21 3:50 AM, LIU Zhiwei wrote:
This patch set is split from RISC-V Packed extension where needs
some i32 vector operations, accorind to Richard Henderson's suggestion.
The original implementation is on
https://www.mail-archive.com/qemu-devel@nongnu.org/msg814538.html.
LIU Zhiwei (5):
tcg: Add tcg_gen_vec_add{sub}16_i32
tcg: Add tcg_gen_vec_add{sub}8_i32
tcg: Add tcg_gen_vec_shl{shr}{sar}16i_i32
tcg: Add tcg_gen_vec_shl{shr}{sar}8i_i32
tcg: Implement tcg_gen_vec_add{sub}32_tl
include/tcg/tcg-op-gvec.h | 43 ++++++++++++++
tcg/tcg-op-gvec.c | 122 ++++++++++++++++++++++++++++++++++++++
2 files changed, 165 insertions(+)
Queued to tcg-next, thanks.
r~
