On 19/06/21 21:38, Jason Thorpe wrote:
Make the PF flag behave like real hardware by always running the
periodic timer without regard to the setting of the PIE bit, so
that the PF will be set when the period expires even if an interrupt
will not be raised. This behavior is documented on page 16 of the
MC146818A advance information datasheet.
Signed-off-by: Jason Thorpe <thor...@me.com>
I agree that there's obviously a bug in QEMU. However, I'm worried of
two things with this patch.
First, the RTC device model has a complicated mechanism to deliver
missed ticks of the periodic timer. This is used with old versions of
Windows which lose track of time if periodic timer interrupts are not
delivered. This mechanism (implemented by rtc_coalesced_timer) right
now always triggers an interrupt. You need to change
periodic_timer_update to not activate this mechanism if PIE=0, by
checking for PIE=1 at the
if (s->lost_tick_policy == LOST_TICK_POLICY_SLEW)
conditional.
Second, the firmware could set a nonzero period, and this would cause
continuous interruptions of the guest after the firmware stops, due to
s->periodic_timer firing. This is "optimized" by the bug that you are
fixing. To keep the optimization you could:
- do the timer_mod in periodic_timer_update only if !PF || (PIE &&
lost_tick_policy==SLEW)
- in cmos_ioport_read, if !timer_pending(s->periodic_timer) call
periodic_timer_update(s, qemu_clock_get_ns(rtc_clock),
s->period, true);
to update s->next_periodic_time for the next tick and ensure PF will be set.
Thanks,
Paolo
---
hw/rtc/mc146818rtc.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
index 4fbafddb22..85abdfd9d1 100644
--- a/hw/rtc/mc146818rtc.c
+++ b/hw/rtc/mc146818rtc.c
@@ -155,9 +155,24 @@ static uint32_t rtc_periodic_clock_ticks(RTCState *s)
{
int period_code;
- if (!(s->cmos_data[RTC_REG_B] & REG_B_PIE)) {
- return 0;
- }
+ /*
+ * Quoting the data sheet "MC146818A Advance Information", 1984,
+ * page 16:
+ *
+ * <quote>
+ * PF - The periodic interrupt flag (PF) is a read-only bit which is
+ * set to a "1" when a particular edge is detected on the selected tap
+ * of the divider chain. The RS3 to RS0 bits establish the periodic
+ * rate. PF is set to "1" independent of the state of the PIE bit.
+ * PF initiates an ~IRQ signal and sets the IRQF bit when PIE is also
+ * a "1". The PF bit is cleared by a ~RESET or a software read of
+ * Register C.
+ * </quote>
+ *
+ * As such, we always run the timer irrespective if the state of
+ * either bit so as to always set PF at regular intervals regardless
+ * of when software reads it.
+ */
period_code = s->cmos_data[RTC_REG_A] & 0x0f;
