Le 02/06/2021 à 12:49, Philippe Mathieu-Daudé a écrit :
> Cc'ing qemu-trivial@
>
> On 3/18/21 4:39 PM, Philippe Mathieu-Daudé wrote:
>> ping?
>>
>> On 3/7/21 8:48 AM, Philippe Mathieu-Daudé wrote:
>>> MemoryRegion names is cached on first call to memory_region_name(),
It is cached on first call but now that it is used in the trace function, does
it mean it will be
always allocated in memory?
Thanks,
Laurent
>>> so displaying the name is trace events is cheap. Add it for read /
>>> write ops.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
>>> ---
>>> softmmu/memory.c | 12 ++++++++----
>>> softmmu/trace-events | 4 ++--
>>> 2 files changed, 10 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/softmmu/memory.c b/softmmu/memory.c
>>> index 874a8fccdee..d4d9ab8828e 100644
>>> --- a/softmmu/memory.c
>>> +++ b/softmmu/memory.c
>>> @@ -444,7 +444,8 @@ static MemTxResult
>>> memory_region_read_accessor(MemoryRegion *mr,
>>> trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp,
>>> size);
>>> } else if
>>> (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
>>> hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
>>> - trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp,
>>> size);
>>> + trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp,
>>> size,
>>> + memory_region_name(mr));
>>> }
>>> memory_region_shift_read_access(value, shift, mask, tmp);
>>> return MEMTX_OK;
>>> @@ -466,7 +467,8 @@ static MemTxResult
>>> memory_region_read_with_attrs_accessor(MemoryRegion *mr,
>>> trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp,
>>> size);
>>> } else if
>>> (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
>>> hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
>>> - trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp,
>>> size);
>>> + trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp,
>>> size,
>>> + memory_region_name(mr));
>>> }
>>> memory_region_shift_read_access(value, shift, mask, tmp);
>>> return r;
>>> @@ -486,7 +488,8 @@ static MemTxResult
>>> memory_region_write_accessor(MemoryRegion *mr,
>>> trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp,
>>> size);
>>> } else if
>>> (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
>>> hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
>>> - trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp,
>>> size);
>>> + trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp,
>>> size,
>>> + memory_region_name(mr));
>>> }
>>> mr->ops->write(mr->opaque, addr, tmp, size);
>>> return MEMTX_OK;
>>> @@ -506,7 +509,8 @@ static MemTxResult
>>> memory_region_write_with_attrs_accessor(MemoryRegion *mr,
>>> trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp,
>>> size);
>>> } else if
>>> (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
>>> hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
>>> - trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp,
>>> size);
>>> + trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp,
>>> size,
>>> + memory_region_name(mr));
>>> }
>>> return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
>>> }
>>> diff --git a/softmmu/trace-events b/softmmu/trace-events
>>> index b80ca042e1f..359fb37cc8d 100644
>>> --- a/softmmu/trace-events
>>> +++ b/softmmu/trace-events
>>> @@ -9,8 +9,8 @@ cpu_in(unsigned int addr, char size, unsigned int val)
>>> "addr 0x%x(%c) value %u"
>>> cpu_out(unsigned int addr, char size, unsigned int val) "addr 0x%x(%c)
>>> value %u"
>>>
>>> # memory.c
>>> -memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t
>>> value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size
>>> %u"
>>> -memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t
>>> value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size
>>> %u"
>>> +memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t
>>> value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64"
>>> value 0x%"PRIx64" size %u name '%s'"
>>> +memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t
>>> value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64"
>>> value 0x%"PRIx64" size %u name '%s'"
>>> memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset,
>>> uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value
>>> 0x%"PRIx64" size %u"
>>> memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset,
>>> uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value
>>> 0x%"PRIx64" size %u"
>>> memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr,
>>> uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value
>>> 0x%"PRIx64" size %u"
>>>
>>
>
