On Fri, 4 Jun 2021 at 09:29, ishii.shuuic...@fujitsu.com <ishii.shuuic...@fujitsu.com> wrote: > > Hi, Richard. > > > Well, Peter disagreed with having them enabled by default in -cpu max, so we > > might need at least one extra property. I see no reason to have three > > properties -- one property a64fx-hpc should be sufficient. But we might not > > want any command-line properties, see below... > > I understood. > > > For comparison, in the Arm Cortex-A76 manual, > > https://developer.arm.com/documentation/100798/0301/ > > section B2.4 "AArch64 registers by functional group", there is a concise > > listing of all of the system registers and their reset values. > > Thank you for the information. > > > The most important of these for QEMU to create '-cpu a64fx' are the > > ID_AA64{ISAR,MMFR,PFR} and MIDR values. These values determine all of > > the > > standard architectural features, > > The values of ID_AA64{ISAR,MMFR,PFR} and MIDR are not listed in the > specifications published at this time. > Of course, they are listed in the A64FX specification document managed within > Fujitsu, > but we cannot tell how far these setting values can be disclosed > without checking with the A64FX specification staff within Fujitsu.
If somebody has access to A64 hardware they could write a minor kernel patch to just print the values... -- PMM
