On 5/26/21 2:59 PM, Michael Morrell wrote:
First, I apologize for the duplicate thread. I thought the first attempt
didn't go through.
I agree with Richard that we need an extra flag bit. The current behavior is
not right for SSE on x86 (it looks like x87 might be different still). For
ARM, setting FPCR.FZ to 1 will result in FPSR.IDC being set for a denormal
input (and that input will be flushed to 0), whereas for x86/SSE, setting
MXCSR.DAZ to 0 will result in MXCSR.DE being set for a denormal input (and
MXCSR.DAZ = 1 flushes that input to 0).
It seems the language for x87 is different because there is no DAZ bit for x87,
only SSE. Thus the x87 DE bit is set for a denormal input which will never be
flushed to zero.
I'm a little surprised there are no x86 test cases that cover this.
The status of x86 is fairly shakey when it comes to tcg. Most of the work for
x86 is all about native virtualization.
The last person to touch this code, Joseph Myers, kindly left us a big fat
FIXME comment in update_mxcsr_from_sse_status.
Richard, are you willing to make the change or do you want me to try?
I'll do it. I've got some outstanding floatx80 cleanups that would be handy to
build upon while doing this.
r~
