Whee! All prerequisites are now merged.
Patches missing r-b:
05-softfpu-Add-float_round_to_odd_inf.patch
06-target-arm-Implement-bfloat16-dot-product-vector.patch
07-target-arm-Implement-bfloat16-dot-product-indexed.patch
11-linux-user-aarch64-Enable-hwcap-bits-for-bfloat16.patch
12-target-arm-Enable-BFloat16-extensions.patch
Per the question of whether additional checks vs VFP or NEON
are required, I have disabled BF16 when either VFP or NEON are
also disabled. Which seems like a similarly reasonable choice.
r~
Richard Henderson (12):
target/arm: Add isar_feature_{aa32,aa64,aa64_sve}_bf16
target/arm: Unify unallocated path in disas_fp_1src
target/arm: Implement scalar float32 to bfloat16 conversion
target/arm: Implement vector float32 to bfloat16 conversion
softfpu: Add float_round_to_odd_inf
target/arm: Implement bfloat16 dot product (vector)
target/arm: Implement bfloat16 dot product (indexed)
target/arm: Implement bfloat16 matrix multiply accumulate
target/arm: Implement bfloat widening fma (vector)
target/arm: Implement bfloat widening fma (indexed)
linux-user/aarch64: Enable hwcap bits for bfloat16
target/arm: Enable BFloat16 extensions
include/fpu/softfloat-types.h | 4 +-
target/arm/cpu.h | 15 ++++
target/arm/helper-sve.h | 4 +
target/arm/helper.h | 15 ++++
target/arm/neon-dp.decode | 1 +
target/arm/neon-shared.decode | 11 +++
target/arm/sve.decode | 19 ++++-
target/arm/vfp.decode | 2 +
linux-user/elfload.c | 2 +
target/arm/cpu.c | 3 +
target/arm/cpu64.c | 3 +
target/arm/cpu_tcg.c | 1 +
target/arm/sve_helper.c | 2 +
target/arm/translate-a64.c | 142 +++++++++++++++++++++++++++++-----
target/arm/translate-neon.c | 91 ++++++++++++++++++++++
target/arm/translate-sve.c | 112 +++++++++++++++++++++++++++
target/arm/translate-vfp.c | 24 ++++++
target/arm/vec_helper.c | 140 ++++++++++++++++++++++++++++++++-
target/arm/vfp_helper.c | 12 +++
fpu/softfloat-parts.c.inc | 6 +-
20 files changed, 584 insertions(+), 25 deletions(-)
--
2.25.1
