On Fri, 30 Apr 2021 at 22:01, Richard Henderson <richard.hender...@linaro.org> wrote: > > From: Stephen Long <stepl...@quicinc.com> > > Add decoding logic for SVE2 64-bit/32-bit scatter non-temporal > store insns. > > 64-bit > * STNT1B (vector plus scalar) > * STNT1H (vector plus scalar) > * STNT1W (vector plus scalar) > * STNT1D (vector plus scalar) > > 32-bit > * STNT1B (vector plus scalar) > * STNT1H (vector plus scalar) > * STNT1W (vector plus scalar) > > Signed-off-by: Stephen Long <stepl...@quicinc.com> > Message-Id: <20200422141553.8037-1-stepl...@quicinc.com> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
