Switch translate-neon.c.inc from being #included into translate.c
to being its own compilation unit.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/translate-a32.h | 3 +++
.../arm/{translate-neon.c.inc => translate-neon.c} | 12 +++++++-----
target/arm/translate.c | 3 ---
target/arm/meson.build | 7 ++++---
4 files changed, 14 insertions(+), 11 deletions(-)
rename target/arm/{translate-neon.c.inc => translate-neon.c} (99%)
diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h
index 3ddb76b76b5..c997f4e3216 100644
--- a/target/arm/translate-a32.h
+++ b/target/arm/translate-a32.h
@@ -24,6 +24,9 @@
bool disas_m_nocp(DisasContext *dc, uint32_t insn);
bool disas_vfp(DisasContext *s, uint32_t insn);
bool disas_vfp_uncond(DisasContext *s, uint32_t insn);
+bool disas_neon_dp(DisasContext *s, uint32_t insn);
+bool disas_neon_ls(DisasContext *s, uint32_t insn);
+bool disas_neon_shared(DisasContext *s, uint32_t insn);
void load_reg_var(DisasContext *s, TCGv_i32 var, int reg);
void arm_gen_condlabel(DisasContext *s);
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c
similarity index 99%
rename from target/arm/translate-neon.c.inc
rename to target/arm/translate-neon.c
index 73bf376ed32..658bd275dac 100644
--- a/target/arm/translate-neon.c.inc
+++ b/target/arm/translate-neon.c
@@ -20,11 +20,13 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-/*
- * This file is intended to be included from translate.c; it uses
- * some macros and definitions provided by that file.
- * It might be possible to convert it to a standalone .c file eventually.
- */
+#include "qemu/osdep.h"
+#include "tcg/tcg-op.h"
+#include "tcg/tcg-op-gvec.h"
+#include "exec/exec-all.h"
+#include "exec/gen-icount.h"
+#include "translate.h"
+#include "translate-a32.h"
static inline int plus1(DisasContext *s, int x)
{
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 18de16ebd0a..455352bcf60 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1206,9 +1206,6 @@ void write_neon_element64(TCGv_i64 src, int reg, int ele,
MemOp memop)
#define ARM_CP_RW_BIT (1 << 20)
-/* Include the Neon decoder */
-#include "translate-neon.c.inc"
-
static inline void iwmmxt_load_reg(TCGv_i64 var, int reg)
{
tcg_gen_ld_i64(var, cpu_env, offsetof(CPUARMState, iwmmxt.regs[reg]));
diff --git a/target/arm/meson.build b/target/arm/meson.build
index f6360f33f11..5bfaf43b500 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -1,8 +1,8 @@
gen = [
decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
- decodetree.process('neon-shared.decode', extra_args:
'--static-decode=disas_neon_shared'),
- decodetree.process('neon-dp.decode', extra_args:
'--static-decode=disas_neon_dp'),
- decodetree.process('neon-ls.decode', extra_args:
'--static-decode=disas_neon_ls'),
+ decodetree.process('neon-shared.decode', extra_args:
'--decode=disas_neon_shared'),
+ decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
+ decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
decodetree.process('vfp.decode', extra_args: '--decode=disas_vfp'),
decodetree.process('vfp-uncond.decode', extra_args:
'--decode=disas_vfp_uncond'),
decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'),
@@ -27,6 +27,7 @@ arm_ss.add(files(
'tlb_helper.c',
'translate.c',
'translate-m-nocp.c',
+ 'translate-neon.c',
'translate-vfp.c',
'vec_helper.c',
'vfp_helper.c',
--
2.20.1
