On Wed, Sep 28, 2011 at 6:09 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 28 September 2011 19:01, Blue Swirl <blauwir...@gmail.com> wrote: >> On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka <jan.kis...@siemens.com> wrote: >>> As we clearly modify the PIC state on pic_reset, we also have to update >>> the IRQ output. This only happened on init so far. Apply this >>> consistently. >> >> Nack, IRQ lines shouldn't be touched on reset. The other side may not >> be ready for receiving the interrupt change and qemu_irqs are >> stateless anyway. > > So how does this work for a device whose reset state is "this > irq/gpio line is asserted" ?
The polarity could be reversed but that wouldn't work if the signal is used in several places. But the duration of reset in QEMU is infinitely small, nothing is expected to happen during that. This doesn't match real HW though, the reset could take several hundred milliseconds but I doubt modeling that would be interesting. We also assume that the reset states of devices and their outputs are coherent i.e. the output of one device during reset would not change the state of another device from its reset state.
