On Sun, 11 Apr 2021 at 16:15, Richard Henderson <richard.hender...@linaro.org> wrote: > > On 4/10/21 10:24 AM, Michael Rolnik wrote: > > Please review. > > > The first 256b is i/o, the next 768b are ram. But having changed the page > size, it should mean that the first 1k are now treated as i/o. > > We do have a path by which instructions in i/o pages can be executed. This > happens on some ARM board setups during cold boot. But we do not save those > translations, so they run much much slower than it should. > > But perhaps in the case of AVR, "much much slower" really isn't visible? > > In general, I think changing the page size is wrong. I also assume that > migration is largely irrelevant to this target.
Migration is irrelevant, but every target benefits from snapshot save-and-restore, and I think that uses the same codepaths ? -- PMM
