On 4/7/21 11:22 PM, Philippe Mathieu-Daudé wrote: > Hi Cédric, > > On 4/7/21 7:16 PM, Cédric Le Goater wrote: >> The RAM memory region is now used for DMAs accesses instead of the >> memory address space region. Mask off the top bits of the DMA address >> to reflect this change. >> >> Cc: Philippe Mathieu-Daudé <f4...@amsat.org> >> Signed-off-by: Cédric Le Goater <c...@kaod.org> >> --- >> hw/i2c/aspeed_i2c.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c >> index 518a3f5c6f9d..e7133528899f 100644 >> --- a/hw/i2c/aspeed_i2c.c >> +++ b/hw/i2c/aspeed_i2c.c >> @@ -601,7 +601,7 @@ static void aspeed_i2c_bus_write(void *opaque, hwaddr >> offset, >> break; >> } >> >> - bus->dma_addr = value & 0xfffffffc; >> + bus->dma_addr = value & 0x3ffffffc; > > This field is migrated (aspeed_i2c_bus_vmstate).
yes. > Does the first patch "aspeed/smc: Use the RAM memory region for DMAs" > break the migration? You are right it does. Maintaining migration compatibility is overkill for this machine, but I should mention the first patch is breaking it. Thanks, C.
