> -----Original Message----- > From: Richard Henderson <richard.hender...@linaro.org> > Sent: Tuesday, April 6, 2021 3:51 PM > To: Taylor Simpson <tsimp...@quicinc.com>; qemu-devel@nongnu.org > Cc: phi...@redhat.com; a...@rev.ng; Brian Cain <bc...@quicinc.com> > Subject: Re: [PATCH v2 14/21] Hexagon (target/hexagon) add A5_ACS > (vacsh) > > On 3/31/21 8:53 PM, Taylor Simpson wrote: > > +#define fGEN_TCG_A5_ACS(SHORTCODE) \ > > + do { \ > > + gen_helper_vacsh_val(RxxV, cpu_env, RxxV, RssV, RttV); \ > > + gen_helper_vacsh_pred(PeV, cpu_env, RxxV, RssV, RttV); \ > > + } while (0) > > You've modified RxxV before its last use. > I think just swapping the two lines is sufficient.
Good catch! I'll have to write a test that exposes this.