On 29/03/21 07:35, David Gibson wrote:
regarding unplug - on device_del QEMU raises SCI interrupt, after this the
process is
asynchronous. When ACPI interpreter gets SCI it sends a respective _EJ0 event
to
devices mentioned in PCI_DOWN_BASE register. After getting the event, guest
OS may
Ok. Is PCI_DOWN_BASE an actual emulated hardware register, or one of
the invented ones you mention above?
It's invented. Which is perhaps not the best word because the point of
ACPI is exactly to let vendor provide a standardized interface that
abstracts any register they invent. Even when QEMU emulates actual
chipset registers, operating systems usually access those registers
through the ACPI interpreter (i.e. through bytecode provided by QEMU).
Either way, I'm assuming there must be a PCI_DOWN_BASE register for
each PCI bus, yes? How is that implemented for PCI to PCI bridges?
Yes (though they are multiplexed on the same I/O port using a
bus-selection register).
Also it doesn't feature pending removal on reboot, that our ACPI PCI hotplug
code has.
Ok, so that is what I was remembering.
Paolo
