RE: [PATCH v8 16/35] Hexagon (target/hexagon/conv_emu.[ch]) utility functions

[Taylor Simpson]

> -----Original Message-----
> From: Richard Henderson <richard.hender...@linaro.org>
> Sent: Thursday, March 18, 2021 10:36 AM
> To: Taylor Simpson <tsimp...@quicinc.com>; qemu-devel@nongnu.org
> Cc: phi...@redhat.com; alex.ben...@linaro.org; laur...@vivier.eu;
> a...@rev.ng; Brian Cain <bc...@quicinc.com>
> Subject: Re: [PATCH v8 16/35] Hexagon (target/hexagon/conv_emu.[ch])
> utility functions
>
> On 3/18/21 8:11 AM, Taylor Simpson wrote:
> > Actually, softfloat raises inexact instead of invalid.  Is there a way to
> override?
>
> Not true:
>
>      switch (p.cls) {
>      case float_class_snan:
>      case float_class_qnan:
>          s->float_exception_flags = orig_flags | float_flag_invalid;
>          return max;

Sorry, I was mistaken.  The difference is in the negative case.
    } else if (float32_is_neg(RsV)) {
        float_raise(float_flag_invalid, &env->fp_status);
        RddV = 0;

For many cases, this is what softfloat does.  The difference comes  when value 
is both negative and near zero (exponent is negative).  Softfloat checks the 
exponent before checking the sign.  round_to_int does this first
        if (a.exp < 0) {
            bool one;
            /* all fractional */
            s->float_exception_flags |= float_flag_inexact;
Then it sets
     a.cls = float_class_zero;
So round_to_uint_and_pack does this
    case float_class_zero:
        return 0;


Here's an example from float_convs
    from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
Softfloat:to uint64: 0 (INEXACT )
Hexagon:to uint64: 0 (INVALID)


So, just looking at the float_convs tests the Hexagon version of f32->uint64 
would be
    if (float32_is_neg(RsV) && !float32_is_any_nan(RsV)) {
        float_raise(float_flag_invalid, &env->fp_status);
        RddV = 0;
    } else {
        RddV = float32_to_uint64_round_to_zero(RsV, &env->fp_status);
    }


Thanks,
Taylor