On 09/18/2011 07:28 PM, Jan Kiszka wrote:
>>
>> This is PIO, limited by the x86 address space to 16 bit. Will add a
>> comment.
>
> x86 PIO is not limited to 16 bits, just ISA, which memory.c knows
> nothing about.
Confused address and data, the former is limited 16, the latter can be
32 as well. But I guess only ISA models made use of the core's split up
service, and that's why QEMU limited itself accordingly.
Let's not bury such details in the core.
>
>> > Why not use access_with_adjusted_size()?
>>
>> Because of different accessor prototypes.
>>
>
> Can be thunked. There is a different issue, a_w_a_s() can use small
> accesses to emulate large ones, but not vice versa. It needs fixing
> anyway.
>
IIRC, that's a feature: Devices not implementing small accesses tend to
refuse them in reality.
I don't think this holds for pci; there the bus always generates 32-bit
writes with separate byte enables for each lane. The device need not
even be aware of a sub-word access, for reads.
--
error compiling committee.c: too many arguments to function
