From: Andrew Jeffery <and...@aj.id.au>
This appears to be a requirement of the GIC model. The AST2600 allocates
197 GIC IRQs, which we will adjust shortly.
Signed-off-by: Andrew Jeffery <and...@aj.id.au>
Reviewed-by: Cédric Le Goater <c...@kaod.org>
Message-Id: <20210302014317.915120-2-and...@aj.id.au>
Signed-off-by: Cédric Le Goater <c...@kaod.org>
---
hw/arm/aspeed_ast2600.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 49b00763864c..3d9e78fcc6b7 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -65,7 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
#define ASPEED_A7MPCORE_ADDR 0x40460000
-#define ASPEED_SOC_AST2600_MAX_IRQ 128
+#define AST2600_MAX_IRQ 128
/* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
static const int aspeed_soc_ast2600_irqmap[] = {
@@ -260,7 +260,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev,
Error **errp)
object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", sc->num_cpus,
&error_abort);
object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
- ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL,
+ ROUND_UP(AST2600_MAX_IRQ + GIC_INTERNAL, 32),
&error_abort);
sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
--
2.26.2
