On 2/28/21 12:25 AM, Richard Henderson wrote: > Add a flag to MIPSCPUClass in order to avoid needing to > replace mips_tcg_ops.do_transaction_failed. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > target/mips/cpu-qom.h | 3 +++ > hw/mips/jazz.c | 35 +++-------------------------------- > target/mips/op_helper.c | 3 ++- > 3 files changed, 8 insertions(+), 33 deletions(-) ... > diff --git a/hw/mips/jazz.c b/hw/mips/jazz.c > index 83c8086062..7b22a9b511 100644 > --- a/hw/mips/jazz.c > +++ b/hw/mips/jazz.c ...> @@ -152,7 +128,7 @@ static void mips_jazz_init(MachineState *machine, > int bios_size, n; > Clock *cpuclk; > MIPSCPU *cpu; > - CPUClass *cc; > + MIPSCPUClass *mcc; > CPUMIPSState *env; > qemu_irq *i8259; > rc4030_dma *dmas; > @@ -199,8 +175,6 @@ static void mips_jazz_init(MachineState *machine, > * However, we can't simply add a global memory region to catch > * everything, as this would make all accesses including instruction > * accesses be ignored and not raise exceptions. > - * So instead we hijack the do_transaction_failed method on the CPU, and > - * do not raise exceptions for data access. > * > * NOTE: this behaviour of raising exceptions for bad instruction > * fetches but not bad data accesses was added in commit 54e755588cf1e9 > @@ -210,11 +184,8 @@ static void mips_jazz_init(MachineState *machine, > * we could replace this hijacking of CPU methods with a simple global > * memory region that catches all memory accesses, as we do on Malta. > */ > - cc = CPU_GET_CLASS(cpu); > -#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) > - real_do_transaction_failed = cc->tcg_ops->do_transaction_failed; > - cc->tcg_ops->do_transaction_failed = mips_jazz_do_transaction_failed;
We don't need the "hw/core/tcg-cpu-ops.h" header anymore. > -#endif /* CONFIG_TCG && !CONFIG_USER_ONLY */ > + mcc = MIPS_CPU_GET_CLASS(cpu); > + mcc->no_data_aborts = true;
