Add support for FEAT_SSBS, Speculative Store Bypass Safe. SSBS is an optional feature in ARMv8.0 and is mandatory in ARMv8.5.
Changes from v1 to v2: o Removed changes to cpsr_write_from_spsr_elx and cpsr_read_for_spsr_elx. o Moved the SSBS case in translate-a64.c above DIT to keep the numbers in order. o Moved the check for SCTLR_DSSBS_32 in take_aarch32_exception. Rebecca Cran (3): target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU target/arm/cpu.c | 4 +++ target/arm/cpu.h | 15 +++++++- target/arm/cpu64.c | 5 +++ target/arm/helper.c | 37 ++++++++++++++++++++ target/arm/internals.h | 6 ++++ target/arm/translate-a64.c | 12 +++++++ 6 files changed, 78 insertions(+), 1 deletion(-) -- 2.26.2
