On Fri, 5 Feb 2021 at 17:00, Peter Maydell <peter.mayd...@linaro.org> wrote: > > Add support for the mps3-an524 board; this is an SSE-200 based FPGA > image, like the existing mps2-an521. It has a usefully larger amount > of RAM, and a PL031 RTC, as well as some more minor differences. > > In real hardware this image runs on a newer generation of the FPGA > board, the MPS3 rather than the older MPS2. Architecturally the two > boards are similar, so we implement the MPS3 boards in the mps2-tz.c > file as variations of the existing MPS2 boards. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/arm/mps2-tz.c | 136 +++++++++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 132 insertions(+), 4 deletions(-) > > diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c > index 17173057af2..aa57c4b2596 100644 > --- a/hw/arm/mps2-tz.c > +++ b/hw/arm/mps2-tz.c > @@ -27,11 +27,13 @@ > * http://infocenter.arm.com/help/topic/com.arm.doc.dai0505b/index.html > * Application Note AN521: > * http://infocenter.arm.com/help/topic/com.arm.doc.dai0521c/index.html > + * Application Note AN524: > + * https://developer.arm.com/documentation/dai0524/latest/ > * > * The AN505 defers to the Cortex-M33 processor ARMv8M IoT Kit FVP User Guide > * (ARM ECM0601256) for the details of some of the device layout: > * > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ecm0601256/index.html > - * Similarly, the AN521 uses the SSE-200, and the SSE-200 TRM defines > + * Similarly, the AN521 and AN524 use the SSE-200, and the SSE-200 TRM > defines > * most of the device layout: > * > http://infocenter.arm.com/help/topic/com.arm.doc.101104_0100_00_en/corelink_sse200_subsystem_for_embedded_technical_reference_manual_101104_0100_00_en.pdf > *
Just noticed that I forgot one place in this header comment that needs updating; this trivial fragment also should be squashed in: --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -16,6 +16,7 @@ * This source file covers the following FPGA images, for TrustZone cores: * "mps2-an505" -- Cortex-M33 as documented in ARM Application Note AN505 * "mps2-an521" -- Dual Cortex-M33 as documented in Application Note AN521 + * "mps2-an524" -- Dual Cortex-M33 as documented in Application Note AN524 * * Links to the TRM for the board itself and to the various Application * Notes which document the FPGA images can be found here: thanks -- PMM
