On Fri, Feb 5, 2021 at 6:45 AM Philippe Mathieu-Daudé <f4...@amsat.org> wrote:
>
> The Xilinx CAN controller test is uses the ZCU102 board which is
> based on a ZynqMP SoC. In the default configuration - used by this
> test - this SoC creates 2 Cortex R5F cores. Such cores are not
> v8A archicture, thus can not be run under KVM. Therefore restrict
> this test to TCG.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> Cc: Alistair Francis <alist...@alistair23.me>
> Cc: "Edgar E. Iglesias" <edgar.igles...@gmail.com>
> Cc: Vikram Garhwal <fnu.vik...@xilinx.com>
> ---
> tests/qtest/meson.build | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index c83bc211b6a..d8ebd5bf98e 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -159,10 +159,10 @@
> (cpu != 'arm' ? ['bios-tables-test'] : []) +
> \
> (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ?
> ['tpm-tis-device-test'] : []) + \
> (config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ?
> ['tpm-tis-device-swtpm-test'] : []) + \
> + (config_all.has_key('CONFIG_TCG') ? ['xlnx-can-test'] : []) + \
> ['arm-cpu-features',
> 'numa-test',
> 'boot-serial-test',
> - 'xlnx-can-test',
> 'migration-test']
>
> qtests_s390x = \
> --
> 2.26.2
>
>
