On 1/28/21 11:40 PM, David Gibson wrote: > On Thu, Jan 28, 2021 at 08:46:01AM +0100, Cédric Le Goater wrote: >> On 1/28/21 1:46 AM, Joel Stanley wrote: >>> On Tue, 26 Jan 2021 at 17:14, Cédric Le Goater <c...@kaod.org> wrote: >>>> >>>> and reuse pnv_bmc_set_pnor() to share the setting of the PNOR. >>>> >>>> Signed-off-by: Cédric Le Goater <c...@kaod.org> >>>> --- >>>> hw/ppc/pnv_bmc.c | 7 +------ >>>> 1 file changed, 1 insertion(+), 6 deletions(-) >>>> >>>> diff --git a/hw/ppc/pnv_bmc.c b/hw/ppc/pnv_bmc.c >>>> index 67ebb16c4d5f..86d16b493539 100644 >>>> --- a/hw/ppc/pnv_bmc.c >>>> +++ b/hw/ppc/pnv_bmc.c >>>> @@ -260,13 +260,8 @@ IPMIBmc *pnv_bmc_create(PnvPnor *pnor) >>>> Object *obj; >>>> >>>> obj = object_new(TYPE_IPMI_BMC_SIMULATOR); >>>> - object_ref(OBJECT(pnor)); >>>> - object_property_add_const_link(obj, "pnor", OBJECT(pnor)); >>> >>> I assume it's ok to move the link set to after the realise of the BMC >>> object? >> >> >> When 2 objects need to be linked, one has to be realized first. >> I suppose this is why it is allowed but I am not expert in that area. >> >> Greg ? >> >> That was the case already when defining a "ipmi-bmc-sim" device on the >> command line. > > Well, the other thing here is that the IPMI_BMC_SIMULATOR isn't a > POWER specific object, and doesn't actually know anything about pnor, > so it never looks at that property. Do we even need it?
It does through hiomap_cmd() which handles HIOMAP commands related to the PNOR. The link was introduced to remove a reference to the global machine (qdev_get_machine()). The PNOR device is instantiated at the machine level but conceptually, this is incorrect. The PNOR is a device controlled by the BMC and accessed by the host through a mapping on the LPC FW address space. It used to be controlled from the host also, through the iLPC2AHB device and mboxes, but these "doors" were closed sometime ago. I am thinking of moving the PNOR at the BMC level. It won't change the default device settings but '-nodefaults' will result in no PNOR, same impact if the BMC device is an external one, but that's a more complex matter. We would need a way to model memory operations on a LPC bus shared by two QEMU machines. We are doing something similar with the Aspeed iBT device but it's very specific to this device. I hope the QEMU multi-process patchset offers some framework on which we can build upon. C.
