On Fri, Jan 22, 2021 at 4:31 AM Bin Meng <bmeng...@gmail.com> wrote:
>
> From: Bin Meng <bin.m...@windriver.com>
>
> There is already a MemMapEntry type defined in hwaddr.h. Let's drop
> the RISC-V defined `struct MemmapEntry` and use the existing one.
>
> Signed-off-by: Bin Meng <bin.m...@windriver.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
>
> hw/riscv/microchip_pfsoc.c | 9 +++------
> hw/riscv/opentitan.c | 9 +++------
> hw/riscv/sifive_e.c | 9 +++------
> hw/riscv/sifive_u.c | 11 ++++-------
> hw/riscv/spike.c | 9 +++------
> hw/riscv/virt.c | 9 +++------
> 6 files changed, 19 insertions(+), 37 deletions(-)
>
> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
> index e952b49e8c..266f1c3342 100644
> --- a/hw/riscv/microchip_pfsoc.c
> +++ b/hw/riscv/microchip_pfsoc.c
> @@ -86,10 +86,7 @@
> * - Register Map/PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm
> * describes the complete IOSCB modules memory maps
> */
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} microchip_pfsoc_memmap[] = {
> +static const MemMapEntry microchip_pfsoc_memmap[] = {
> [MICROCHIP_PFSOC_RSVD0] = { 0x0, 0x100 },
> [MICROCHIP_PFSOC_DEBUG] = { 0x100, 0xf00 },
> [MICROCHIP_PFSOC_E51_DTIM] = { 0x1000000, 0x2000 },
> @@ -182,7 +179,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev,
> Error **errp)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> MicrochipPFSoCState *s = MICROCHIP_PFSOC(dev);
> - const struct MemmapEntry *memmap = microchip_pfsoc_memmap;
> + const MemMapEntry *memmap = microchip_pfsoc_memmap;
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *rsvd0_mem = g_new(MemoryRegion, 1);
> MemoryRegion *e51_dtim_mem = g_new(MemoryRegion, 1);
> @@ -451,7 +448,7 @@ type_init(microchip_pfsoc_soc_register_types)
> static void microchip_icicle_kit_machine_init(MachineState *machine)
> {
> MachineClass *mc = MACHINE_GET_CLASS(machine);
> - const struct MemmapEntry *memmap = microchip_pfsoc_memmap;
> + const MemMapEntry *memmap = microchip_pfsoc_memmap;
> MicrochipIcicleKitState *s = MICROCHIP_ICICLE_KIT_MACHINE(machine);
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *mem_low = g_new(MemoryRegion, 1);
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index af3456932f..e168bffe69 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -28,10 +28,7 @@
> #include "qemu/units.h"
> #include "sysemu/sysemu.h"
>
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} ibex_memmap[] = {
> +static const MemMapEntry ibex_memmap[] = {
> [IBEX_DEV_ROM] = { 0x00008000, 16 * KiB },
> [IBEX_DEV_RAM] = { 0x10000000, 0x10000 },
> [IBEX_DEV_FLASH] = { 0x20000000, 0x80000 },
> @@ -66,7 +63,7 @@ static const struct MemmapEntry {
>
> static void opentitan_board_init(MachineState *machine)
> {
> - const struct MemmapEntry *memmap = ibex_memmap;
> + const MemMapEntry *memmap = ibex_memmap;
> OpenTitanState *s = g_new0(OpenTitanState, 1);
> MemoryRegion *sys_mem = get_system_memory();
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> @@ -114,7 +111,7 @@ static void lowrisc_ibex_soc_init(Object *obj)
>
> static void lowrisc_ibex_soc_realize(DeviceState *dev_soc, Error **errp)
> {
> - const struct MemmapEntry *memmap = ibex_memmap;
> + const MemMapEntry *memmap = ibex_memmap;
> MachineState *ms = MACHINE(qdev_get_machine());
> LowRISCIbexSoCState *s = RISCV_IBEX_SOC(dev_soc);
> MemoryRegion *sys_mem = get_system_memory();
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 59bac4cc9a..f939bcf9ea 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -50,10 +50,7 @@
> #include "sysemu/sysemu.h"
> #include "exec/address-spaces.h"
>
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} sifive_e_memmap[] = {
> +static MemMapEntry sifive_e_memmap[] = {
> [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
> [SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
> [SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
> @@ -77,7 +74,7 @@ static const struct MemmapEntry {
>
> static void sifive_e_machine_init(MachineState *machine)
> {
> - const struct MemmapEntry *memmap = sifive_e_memmap;
> + const MemMapEntry *memmap = sifive_e_memmap;
>
> SiFiveEState *s = RISCV_E_MACHINE(machine);
> MemoryRegion *sys_mem = get_system_memory();
> @@ -187,7 +184,7 @@ static void sifive_e_soc_init(Object *obj)
> static void sifive_e_soc_realize(DeviceState *dev, Error **errp)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> - const struct MemmapEntry *memmap = sifive_e_memmap;
> + const MemMapEntry *memmap = sifive_e_memmap;
> SiFiveESoCState *s = RISCV_E_SOC(dev);
> MemoryRegion *sys_mem = get_system_memory();
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 59b61cea01..51e4132fc4 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -60,10 +60,7 @@
>
> #include <libfdt.h>
>
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} sifive_u_memmap[] = {
> +static const MemMapEntry sifive_u_memmap[] = {
> [SIFIVE_U_DEV_DEBUG] = { 0x0, 0x100 },
> [SIFIVE_U_DEV_MROM] = { 0x1000, 0xf000 },
> [SIFIVE_U_DEV_CLINT] = { 0x2000000, 0x10000 },
> @@ -86,7 +83,7 @@ static const struct MemmapEntry {
> #define OTP_SERIAL 1
> #define GEM_REVISION 0x10070109
>
> -static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
> +static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap,
> uint64_t mem_size, const char *cmdline, bool
> is_32_bit)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> @@ -428,7 +425,7 @@ static void sifive_u_machine_reset(void *opaque, int n,
> int level)
>
> static void sifive_u_machine_init(MachineState *machine)
> {
> - const struct MemmapEntry *memmap = sifive_u_memmap;
> + const MemMapEntry *memmap = sifive_u_memmap;
> SiFiveUState *s = RISCV_U_MACHINE(machine);
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> @@ -686,7 +683,7 @@ static void sifive_u_soc_realize(DeviceState *dev, Error
> **errp)
> {
> MachineState *ms = MACHINE(qdev_get_machine());
> SiFiveUSoCState *s = RISCV_U_SOC(dev);
> - const struct MemmapEntry *memmap = sifive_u_memmap;
> + const MemMapEntry *memmap = sifive_u_memmap;
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1);
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 56986ecfe0..ed4ca9808e 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -43,16 +43,13 @@
> #include "sysemu/qtest.h"
> #include "sysemu/sysemu.h"
>
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} spike_memmap[] = {
> +static const MemMapEntry spike_memmap[] = {
> [SPIKE_MROM] = { 0x1000, 0xf000 },
> [SPIKE_CLINT] = { 0x2000000, 0x10000 },
> [SPIKE_DRAM] = { 0x80000000, 0x0 },
> };
>
> -static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
> +static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
> uint64_t mem_size, const char *cmdline, bool
> is_32_bit)
> {
> void *fdt;
> @@ -179,7 +176,7 @@ static void create_fdt(SpikeState *s, const struct
> MemmapEntry *memmap,
>
> static void spike_board_init(MachineState *machine)
> {
> - const struct MemmapEntry *memmap = spike_memmap;
> + const MemMapEntry *memmap = spike_memmap;
> SpikeState *s = SPIKE_MACHINE(machine);
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 2299b3a6be..cfd52bc59b 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -43,10 +43,7 @@
> #include "hw/pci/pci.h"
> #include "hw/pci-host/gpex.h"
>
> -static const struct MemmapEntry {
> - hwaddr base;
> - hwaddr size;
> -} virt_memmap[] = {
> +static const MemMapEntry virt_memmap[] = {
> [VIRT_DEBUG] = { 0x0, 0x100 },
> [VIRT_MROM] = { 0x1000, 0xf000 },
> [VIRT_TEST] = { 0x100000, 0x1000 },
> @@ -170,7 +167,7 @@ static void create_pcie_irq_map(void *fdt, char *nodename,
> 0x1800, 0, 0, 0x7);
> }
>
> -static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
> +static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
> uint64_t mem_size, const char *cmdline, bool
> is_32_bit)
> {
> void *fdt;
> @@ -490,7 +487,7 @@ static inline DeviceState *gpex_pcie_init(MemoryRegion
> *sys_mem,
>
> static void virt_machine_init(MachineState *machine)
> {
> - const struct MemmapEntry *memmap = virt_memmap;
> + const MemMapEntry *memmap = virt_memmap;
> RISCVVirtState *s = RISCV_VIRT_MACHINE(machine);
> MemoryRegion *system_memory = get_system_memory();
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> --
> 2.25.1
>
>
